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drm/i915/gvt: Reduce rcs mocs switch latency
author
Changbin Du
<changbin.du@intel.com>
Mon, 30 Oct 2017 06:19:15 +0000
(14:19 +0800)
committer
Zhenyu Wang
<zhenyuw@linux.intel.com>
Thu, 16 Nov 2017 03:48:33 +0000
(11:48 +0800)
Use I915_WRITE_FW instead of I915_WRITE to reduce overhead.
The overall mmio switch latency lowers from ~600us to ~180us.
Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/render.c
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diff --git
a/drivers/gpu/drm/i915/gvt/render.c
b/drivers/gpu/drm/i915/gvt/render.c
index
e16c355
..
0672178
100644
(file)
--- a/
drivers/gpu/drm/i915/gvt/render.c
+++ b/
drivers/gpu/drm/i915/gvt/render.c
@@
-209,7
+209,7
@@
static void load_mocs(struct intel_vgpu *vgpu, int ring_id)
offset.reg = regs[ring_id];
for (i = 0; i < 64; i++) {
gen9_render_mocs[ring_id][i] = I915_READ_FW(offset);
- I915_WRITE(offset, vgpu_vreg(vgpu, offset));
+ I915_WRITE
_FW
(offset, vgpu_vreg(vgpu, offset));
offset.reg += 4;
}