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nouveau: add support for Turing chipsets
pie-x86
r-x86
author
Mauro Rossi
<issor.oruam@gmail.com>
Sat, 16 Jan 2021 16:29:48 +0000
(17:29 +0100)
committer
Mauro Rossi
<issor.oruam@gmail.com>
Sat, 16 Jan 2021 16:29:48 +0000
(17:29 +0100)
NV_TURING 0x160 chipsets handling is added in gralloc_drm_nouveau.c
gralloc_drm_nouveau.c
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diff --git
a/gralloc_drm_nouveau.c
b/gralloc_drm_nouveau.c
index
4f57fe1
..
f9fb489
100644
(file)
--- a/
gralloc_drm_nouveau.c
+++ b/
gralloc_drm_nouveau.c
@@
-49,6
+49,7
@@
#define NV_MAXWELL 0x110
#define NV_PASCAL 0x130
#define NV_VOLTA 0x140
+#define NV_TURING 0x160
#define NV50_TILE_HEIGHT(m) (4 << ((m) >> 4))
#define NVC0_TILE_HEIGHT(m) (8 << ((m) >> 4))
@@
-375,6
+376,9
@@
static int nouveau_init(struct nouveau_info *info)
case 0x140:
info->arch = NV_VOLTA;
break;
+ case 0x160:
+ info->arch = NV_TURING;
+ break;
default:
ALOGE("unknown nouveau chipset 0x%x", info->dev->chipset);
err = -EINVAL;