From: Eric Bernstein Date: Wed, 14 Jul 2021 18:21:08 +0000 (-0400) Subject: drm/amd/display: Always wait for update lock status X-Git-Tag: v5.15-rc1~32^2~20^2~22 X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=02352bfd78c30152b46c8b6d66c32f9f9389f0b7;p=tomoyo%2Ftomoyo-test1.git drm/amd/display: Always wait for update lock status Remove code that would skip wait for lock status for Diags FPGA case Reviewed-by: Laktyushkin Dmytro Acked-by: Solomon Chiu Signed-off-by: Eric Bernstein Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c index f37e8254df21..089be7347591 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c @@ -109,11 +109,9 @@ void optc3_lock(struct timing_generator *optc) REG_SET(OTG_MASTER_UPDATE_LOCK, 0, OTG_MASTER_UPDATE_LOCK, 1); - /* Should be fast, status does not update on maximus */ - if (optc->ctx->dce_environment != DCE_ENV_FPGA_MAXIMUS) - REG_WAIT(OTG_MASTER_UPDATE_LOCK, - UPDATE_LOCK_STATUS, 1, - 1, 10); + REG_WAIT(OTG_MASTER_UPDATE_LOCK, + UPDATE_LOCK_STATUS, 1, + 1, 10); } void optc3_set_out_mux(struct timing_generator *optc, enum otg_out_mux_dest dest)