From: Thomas Huth Date: Mon, 17 Oct 2016 18:22:17 +0000 (+0100) Subject: hw/dma/pl080: Fix bad bit mask (PL080_CONF_M1 | PL080_CONF_M1) X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=04bb79d1f519ae190acf836ff9e07bef5086fad0;p=qmiga%2Fqemu.git hw/dma/pl080: Fix bad bit mask (PL080_CONF_M1 | PL080_CONF_M1) The M1 and M2 bits are both used for configuring the endianness of the AHB master interfaces, so the second PL080_CONF_M1 should be PL080_CONF_M2 instead. Buglink: https://bugs.launchpad.net/qemu/+bug/1631773 Signed-off-by: Thomas Huth Message-id: 1476274451-26567-1-git-send-email-thuth@redhat.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- diff --git a/hw/dma/pl080.c b/hw/dma/pl080.c index 3bed5c3390..7724c93b8f 100644 --- a/hw/dma/pl080.c +++ b/hw/dma/pl080.c @@ -351,7 +351,7 @@ static void pl080_write(void *opaque, hwaddr offset, break; case 12: /* Configuration */ s->conf = value; - if (s->conf & (PL080_CONF_M1 | PL080_CONF_M1)) { + if (s->conf & (PL080_CONF_M1 | PL080_CONF_M2)) { qemu_log_mask(LOG_UNIMP, "pl080_write: Big-endian DMA not implemented\n"); }