From: K.Ohta Date: Wed, 29 May 2019 17:14:25 +0000 (+0900) Subject: [VM][PC9801][WIP] Problems of EMM386.EXE(98) seems to be mis-detect of high-resolutii... X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=054ebfd59f48fc6dd96aadd7f96bbc4a34c1cd99;p=csp-qt%2Fcommon_source_project-fm7.git [VM][PC9801][WIP] Problems of EMM386.EXE(98) seems to be mis-detect of high-resolutiion.Will fix. --- diff --git a/source/src/vm/common_vm/CMakeLists.txt b/source/src/vm/common_vm/CMakeLists.txt index 990c52c59..df1bcfcba 100644 --- a/source/src/vm/common_vm/CMakeLists.txt +++ b/source/src/vm/common_vm/CMakeLists.txt @@ -1,6 +1,6 @@ message("* vm/common_vm") -SET(THIS_LIB_VERSION 2.16.1) +SET(THIS_LIB_VERSION 2.16.2) #include(cotire) set(s_vm_common_vm_srcs diff --git a/source/src/vm/i386.cpp b/source/src/vm/i386.cpp index dc0214120..953291a6d 100644 --- a/source/src/vm/i386.cpp +++ b/source/src/vm/i386.cpp @@ -445,6 +445,7 @@ void I386::release() free(opaque); } + void I386::reset() { i386_state *cpustate = (i386_state *)opaque; diff --git a/source/src/vm/pc9801/cpureg.cpp b/source/src/vm/pc9801/cpureg.cpp index 55b10e93c..5ce64345b 100644 --- a/source/src/vm/pc9801/cpureg.cpp +++ b/source/src/vm/pc9801/cpureg.cpp @@ -180,10 +180,10 @@ uint32_t CPUREG::read_io8(uint32_t addr) value |= 0x20; // Internal 27-type SASI-HDD, 0 = Existing #endif // ToDo: AMD98 -// value |= 0x10; // Unknown + value |= 0x10; // Unknown value |= 0x08; // value |= ((d_mem->read_signal(SIG_LAST_ACCESS_INTERAM) != 0) ? 0x00: 0x08); // RAM access, 1 = Internal-standard/External-enhanced RAM, 0 = Internal-enhanced RAM -// value |= 0x04; // Refresh mode, 1 = Standard, 0 = High speed + value |= 0x04; // Refresh mode, 1 = Standard, 0 = High speed //#if defined(HAS_I86) || defined(HAS_V30) // ToDo: Older VMs. value |= ((reg_0f0 & 0x01) == 0) ? 0x00 : 0x02; // CPU mode, 1 = V30, 0 = 80286/80386 diff --git a/source/src/vm/pc9801/membus.cpp b/source/src/vm/pc9801/membus.cpp index 9249f403d..075fb6b8b 100644 --- a/source/src/vm/pc9801/membus.cpp +++ b/source/src/vm/pc9801/membus.cpp @@ -530,13 +530,17 @@ uint32_t MEMBUS::read_io8(uint32_t addr) return dma_access_ctrl; #endif #if !defined(SUPPORT_HIRESO) - case 0x0461: + case 0x0461: // ToDo: Some VMs enable to read value. + return 0xff; + break; #else case 0x0091: #endif return window_80000h >> 16; #if !defined(SUPPORT_HIRESO) - case 0x0463: + case 0x0463: // ToDo: Some VMs enable to read value. + return 0xff; + break; #else case 0x0093: #endif @@ -622,10 +626,9 @@ uint32_t MEMBUS::read_signal(int ch) void MEMBUS::config_intram() { #if !defined(SUPPORT_HIRESO) - #if defined(SUPPORT_32BIT_ADDRESS) - set_memory_rw(0x00000, (sizeof(ram) >= 0x80000) ? 0x7ffff : (sizeof(ram) - 1), ram); - #elif defined(SUPPORT_24BIT_ADDRESS) + #if defined(SUPPORT_32BIT_ADDRESS) || defined(SUPPORT_24BIT_ADDRESS) set_memory_rw(0x00000, (sizeof(ram) >= 0x80000) ? 0x7ffff : (sizeof(ram) - 1), ram); +// set_memory_rw(0x00000, (sizeof(ram) >= 0xa0000) ? 0x9ffff : (sizeof(ram) - 1), ram); #else set_memory_rw(0x00000, (sizeof(ram) >= 0xc0000) ? 0xbffff : (sizeof(ram) - 1), ram); #endif @@ -646,7 +649,8 @@ void MEMBUS::update_bios() { #if !defined(SUPPORT_HIRESO) #if defined(SUPPORT_32BIT_ADDRESS)|| defined(SUPPORT_24BIT_ADDRESS) - unset_memory_rw(0x80000, 0xbffff); +// unset_memory_rw(0x80000, 0xbffff); + unset_memory_rw(0xa0000, 0xbffff); #endif set_memory_mapped_io_rw(0xa0000, 0xa4fff, d_display); set_memory_mapped_io_rw(0xa8000, 0xbffff, d_display); @@ -848,6 +852,7 @@ void MEMBUS::update_bios() if((window_a0000h >= 0xa0000) && (window_a0000h <= 0xeffff)) { d_display->write_signal(SIG_DISPLAY98_SET_PAGE_A0, window_a0000h, 0xffffffff); } + // ToDo: PC9821 #if defined(SUPPORT_32BIT_ADDRESS) unset_memory_rw(0x00f00000, (UPPER_MEMORY_32BIT & 0x00ffffff) - 1); diff --git a/source/src/vm/pc9801/pc9801.cpp b/source/src/vm/pc9801/pc9801.cpp index 9601afe33..ca552d627 100644 --- a/source/src/vm/pc9801/pc9801.cpp +++ b/source/src/vm/pc9801/pc9801.cpp @@ -625,8 +625,13 @@ VM::VM(EMU* parent_emu) : VM_TEMPLATE(parent_emu) io->set_iomap_alias_rw(0x0030, sio_rs, 0); io->set_iomap_alias_rw(0x0032, sio_rs, 1); +#if !(defined(_PC9821AP) || defined(_PC9821AS) || defined(_PC9821AE) || defined(_PC98H) || defined(_PC98LT_VARIANTS)) + io->set_iomap_alias_r(0x0031, pio_sys, 0); +#else io->set_iomap_alias_rw(0x0031, pio_sys, 0); - io->set_iomap_alias_rw(0x0033, pio_sys, 1); +#endif +// io->set_iomap_alias_rw(0x0033, pio_sys, 1); + io->set_iomap_alias_r(0x0033, pio_sys, 1); // PORTB should be read only. io->set_iomap_alias_rw(0x0035, pio_sys, 2); io->set_iomap_alias_w (0x0037, pio_sys, 3); @@ -1265,8 +1270,16 @@ void VM::reset() // initial device settings uint8_t port_a, port_b, port_c, port_b2; #if defined(USE_MONITOR_TYPE) /*&& defined(SUPPORT_HIRESO)*/ +#if !defined(SUPPORT_HIRESO) + io->set_iovalue_single_r(0x0467, 0xfe); // Detect high-reso. + io->set_iovalue_single_r(0x0ca0, 0xff); // Detect high-reso. +#endif if(config.monitor_type == 0) { +#if defined(SUPPORT_HIRESO) io->set_iovalue_single_r(0x0431, 0x00); +#else + io->set_iovalue_single_r(0x0431, 0x04); +#endif gdc_gfx->set_horiz_freq(24830); gdc_chr->set_horiz_freq(24830); @@ -1276,7 +1289,7 @@ void VM::reset() gdc_chr->set_horiz_freq(15750); } #else - io->set_iovalue_single_r(0x0431, 0x00); + io->set_iovalue_single_r(0x0431, 0x04); #endif // reset all devices for(DEVICE* device = first_device; device; device = device->next_device) { diff --git a/source/src/vm/pc9801/pc9801.h b/source/src/vm/pc9801/pc9801.h index b73dc9869..df580265a 100644 --- a/source/src/vm/pc9801/pc9801.h +++ b/source/src/vm/pc9801/pc9801.h @@ -111,14 +111,9 @@ #define HAS_I286 #define CPU_CLOCKS 7987248 #define PIT_CLOCK_8MHZ -#elif defined(_PC9801RA) || defined(_PC98RL) - #if defined(_PC9801RA) - #define DEVICE_NAME "NEC PC-9801RA" - #define CONFIG_NAME "pc9801ra" - #elif defined(_PC98RL) - #define DEVICE_NAME "NEC PC-98RL" - #define CONFIG_NAME "pc98rl" - #endif +#elif defined(_PC98RL) + #define DEVICE_NAME "NEC PC-98RL" + #define CONFIG_NAME "pc98rl" #define HAS_I386 #define CPU_CLOCKS 19968120 #define PIT_CLOCK_5MHZ @@ -126,6 +121,16 @@ // #define PIT_CLOCK_8MHZ #define USE_CPU_TYPE 2 #define SUPPORT_24BIT_ADDRESS +#elif defined(_PC9801RA) + #define DEVICE_NAME "NEC PC-9801RA" + #define CONFIG_NAME "pc9801ra" + #define HAS_I386 + #define CPU_CLOCKS 19968120 + #define PIT_CLOCK_5MHZ +// #define CPU_CLOCKS 15974496 +// #define PIT_CLOCK_8MHZ + #define USE_CPU_TYPE 2 + #define SUPPORT_32BIT_ADDRESS #else // unknown machines #endif