From: Peter Maydell <peter.maydell@linaro.org>
Date: Fri, 17 Aug 2018 08:46:00 +0000 (+0100)
Subject: Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' into staging
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=0abaa41d936becd914a16ee1fe2a981d96d19428;p=qmiga%2Fqemu.git

Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' into staging

x86 queue, 2018-08-16

Bug fix:
* Some guests may crash when using "-cpu host" due to TOPOEXT,
  disable it by default

Features:
* PV_SEND_IPI feature bit
* Icelake-{Server,Client} CPU models
* New CPUID feature bits: PV_SEND_IPI, WBNOINVD, PCONFIG, ARCH_CAPABILITIES

Documentation:
* docs/qemu-cpu-models.texi

# gpg: Signature made Fri 17 Aug 2018 02:33:09 BST
# gpg:                using RSA key 2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/x86-next-pull-request:
  i386: Disable TOPOEXT by default on "-cpu host"
  target-i386: adds PV_SEND_IPI CPUID feature bit
  i386: Add new CPU model Icelake-{Server,Client}
  i386: Add CPUID bit for WBNOINVD
  i386: Add CPUID bit for PCONFIG
  i386: Add CPUID bit and feature words for IA32_ARCH_CAPABILITIES MSR
  i386: Add new MSR indices for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES
  docs: add guidance on configuring CPU models for x86

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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