From: Krzysztof Kozlowski Date: Thu, 9 Mar 2023 15:49:49 +0000 (+0100) Subject: pinctrl: qcom: sm8550-lpass-lpi: allow GPIO function X-Git-Tag: v6.4-rc1~53^2~75 X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=10fe4a1399d259b380dafa0f669c0a209e4f8197;p=tomoyo%2Ftomoyo-test1.git pinctrl: qcom: sm8550-lpass-lpi: allow GPIO function All LPASS pins have basic GPIO function and most of the code is ready for that. Add missing glue pieces to allow LPASS pins to work as GPIO, which is going to be used on MTP8550 and QRD8550 boards. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230309154949.658380-4-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij --- diff --git a/drivers/pinctrl/qcom/pinctrl-sm8550-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sm8550-lpass-lpi.c index c2bdd936d27f..db1a46fee9c6 100644 --- a/drivers/pinctrl/qcom/pinctrl-sm8550-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-sm8550-lpass-lpi.c @@ -102,6 +102,13 @@ static const struct pinctrl_pin_desc sm8550_lpi_pins[] = { PINCTRL_PIN(22, "gpio22"), }; +static const char * const gpio_groups[] = { + "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", + "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", + "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", + "gpio22", +}; + static const char * const dmic1_clk_groups[] = { "gpio6" }; static const char * const dmic1_data_groups[] = { "gpio7" }; static const char * const dmic2_clk_groups[] = { "gpio8" }; @@ -168,6 +175,7 @@ static const struct lpi_pingroup sm8550_groups[] = { }; static const struct lpi_function sm8550_functions[] = { + LPI_FUNCTION(gpio), LPI_FUNCTION(dmic1_clk), LPI_FUNCTION(dmic1_data), LPI_FUNCTION(dmic2_clk),