From: Chris Demetriou <cgd@google.com>
Date: Fri, 1 Mar 2002 07:34:57 +0000 (+0000)
Subject: 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
X-Git-Tag: gdb_5_2-2002-03-03-branchpoint~14
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=1487be560bd5166bea49770951d50cf20e6cb68c;p=pf3gnuchains%2Fpf3gnuchains4x.git

2002-02-28  Chris Demetriou  <cgd@broadcom.com>

        * mips.igen (DSRA32, DSRAV): Fix order of arguments in
        instruction-printing string.
        (LWU): Use '64' as the filter flag.
---

diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index e3ca0ec04a..cb69ddb74c 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,5 +1,11 @@
 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 
+	* mips.igen (DSRA32, DSRAV): Fix order of arguments in
+	instruction-printing string.
+	(LWU): Use '64' as the filter flag.
+
+2002-02-28  Chris Demetriou  <cgd@broadcom.com>
+
 	* mips.igen (SDXC1): Fix instruction-printing string.
 
 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index eb51119459..02ae760783 100644
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -1248,7 +1248,7 @@
 
 
 000000,00000,5.RT,5.RD,5.SHIFT,111111:SPECIAL:64::DSRA32
-"dsra32 r<RT>, r<RD>, <SHIFT>"
+"dsra32 r<RD>, r<RT>, <SHIFT>"
 *mipsIII:
 *mipsIV:
 *mipsV:
@@ -1270,7 +1270,7 @@
 }
 
 000000,5.RS,5.RT,5.RD,00000,010111:SPECIAL:64::DSRAV
-"dsrav r<RT>, r<RD>, r<RS>"
+"dsrav r<RD>, r<RT>, r<RS>"
 *mipsIII:
 *mipsIV:
 *mipsV:
@@ -1824,7 +1824,7 @@
 }
 
 
-100111,5.BASE,5.RT,16.OFFSET:NORMAL:32::LWU
+100111,5.BASE,5.RT,16.OFFSET:NORMAL:64::LWU
 "lwu r<RT>, <OFFSET>(r<BASE>)"
 *mipsIII:
 *mipsIV: