From: Jason Wang Date: Thu, 22 Mar 2012 10:01:50 +0000 (+0800) Subject: e1000: conditionally raise irq at the end of MDI cycle X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=17fbbb0b3d0b09f07d288991248c81f441bf6941;p=qmiga%2Fqemu.git e1000: conditionally raise irq at the end of MDI cycle According to the spec: "When set to 1b by software, it causes an Interrupt to be asserted to indicate the end of an MDI cycle." We need check the Interrupt Enable bit and raise irq only when it is set. Signed-off-by: Jason Wang Signed-off-by: Michael S. Tsirkin --- diff --git a/hw/e1000.c b/hw/e1000.c index dd067680c9..4e787bc2cf 100644 --- a/hw/e1000.c +++ b/hw/e1000.c @@ -274,7 +274,10 @@ set_mdic(E1000State *s, int index, uint32_t val) s->phy_reg[addr] = data; } s->mac_reg[MDIC] = val | E1000_MDIC_READY; - set_ics(s, 0, E1000_ICR_MDAC); + + if (val & E1000_MDIC_INT_EN) { + set_ics(s, 0, E1000_ICR_MDAC); + } } static uint32_t