From: Evan Quan Date: Wed, 30 Sep 2020 06:48:11 +0000 (+0800) Subject: drm/amdgpu: enable MULTI_MON_PP_MCLK_SWITCH DC feature at default X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=191a3c04799e4d1c1153442647629669bbf6c882;p=uclinux-h8%2Flinux.git drm/amdgpu: enable MULTI_MON_PP_MCLK_SWITCH DC feature at default With this, for multiple monitors in sync(e.g. with the same model), mclk switching will be allowed. That helps saving some idle power on some ASICs(e.g. Polaris). Signed-off-by: Evan Quan Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 114447824fbd..4933f6599e16 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -140,8 +140,16 @@ int amdgpu_compute_multipipe = -1; int amdgpu_gpu_recovery = -1; /* auto */ int amdgpu_emu_mode = 0; uint amdgpu_smu_memory_pool_size = 0; -/* FBC (bit 0) disabled by default*/ -uint amdgpu_dc_feature_mask = 0; +/* + * FBC (bit 0) disabled by default + * MULTI_MON_PP_MCLK_SWITCH (bit 1) enabled by default + * - With this, for multiple monitors in sync(e.g. with the same model), + * mclk switching will be allowed. And the mclk will be not foced to the + * highest. That helps saving some idle power. + * DISABLE_FRACTIONAL_PWM (bit 2) disabled by default + * PSR (bit 3) disabled by default + */ +uint amdgpu_dc_feature_mask = 2; uint amdgpu_dc_debug_mask = 0; int amdgpu_async_gfx_ring = 1; int amdgpu_mcbp = 0;