From: Zhao Halley <halley.zhao@intel.com>
Date: Thu, 19 Jul 2012 10:12:41 +0000 (+0300)
Subject: add rgbx to nv12 conversion in post-processing
X-Git-Tag: android-x86-7.1-r1~1370
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=191d189dace1545e5c16269e04855a240507ab9a;p=android-x86%2Fhardware-intel-common-vaapi.git

add rgbx to nv12 conversion in post-processing
---

diff --git a/src/i965_post_processing.c b/src/i965_post_processing.c
index aace564..21dee74 100755
--- a/src/i965_post_processing.c
+++ b/src/i965_post_processing.c
@@ -107,6 +107,10 @@ static const uint32_t pp_pa_load_save_pl3_gen5[][4] = {
 #include "shaders/post_processing/gen5_6/pa_load_save_pl3.g4b.gen5"
 };
 
+static const uint32_t pp_rgbx_load_save_nv12_gen5[][4] = {
+#include "shaders/post_processing/gen5_6/rgbx_load_save_nv12.g4b.gen5"
+};
+
 static VAStatus pp_null_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
                                    const struct i965_surface *src_surface,
                                    const VARectangle *src_rect,
@@ -307,6 +311,18 @@ static struct pp_module pp_modules_gen5[] = {
         pp_plx_load_save_plx_initialize,
     },
 
+    {
+        {
+            "RGBX_NV12 module",
+            PP_RGBX_LOAD_SAVE_NV12,
+            pp_rgbx_load_save_nv12_gen5,
+            sizeof(pp_rgbx_load_save_nv12_gen5),
+            NULL,
+        },
+    
+        pp_plx_load_save_plx_initialize,
+    },
+            
 };
 
 static const uint32_t pp_null_gen6[][4] = {
@@ -361,6 +377,10 @@ static const uint32_t pp_pa_load_save_pl3_gen6[][4] = {
 #include "shaders/post_processing/gen5_6/pa_load_save_pl3.g6b"
 };
 
+static const uint32_t pp_rgbx_load_save_nv12_gen6[][4] = {
+#include "shaders/post_processing/gen5_6/rgbx_load_save_nv12.g6b"
+};
+
 static struct pp_module pp_modules_gen6[] = {
     {
         {
@@ -517,6 +537,18 @@ static struct pp_module pp_modules_gen6[] = {
         pp_plx_load_save_plx_initialize,
     },
     
+    {
+        {
+            "RGBX_NV12 module",
+            PP_RGBX_LOAD_SAVE_NV12,
+            pp_rgbx_load_save_nv12_gen6,
+            sizeof(pp_rgbx_load_save_nv12_gen6),
+            NULL,
+        },
+    
+        pp_plx_load_save_plx_initialize,
+    },
+
 };
 
 static const uint32_t pp_null_gen7[][4] = {
@@ -564,6 +596,8 @@ static const uint32_t pp_pa_load_save_nv12_gen7[][4] = {
 static const uint32_t pp_pa_load_save_pl3_gen7[][4] = {
 #include "shaders/post_processing/gen7/pa_to_pl3.g7b"
 };
+static const uint32_t pp_rgbx_load_save_nv12_gen7[][4] = {
+};
 
 static VAStatus gen7_pp_plx_avs_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
                                            const struct i965_surface *src_surface,
@@ -740,6 +774,18 @@ static struct pp_module pp_modules_gen7[] = {
         gen7_pp_plx_avs_initialize,
     },
     
+    {
+        {
+            "RGBX_NV12 module",
+            PP_RGBX_LOAD_SAVE_NV12,
+            pp_rgbx_load_save_nv12_gen7,
+            sizeof(pp_rgbx_load_save_nv12_gen7),
+            NULL,
+        },
+    
+        pp_plx_load_save_plx_initialize,
+    },
+
 };
 
 static int
@@ -4035,6 +4081,35 @@ i965_post_processing(
 }       
 
 static VAStatus
+i965_image_pl1_rgbx_processing(VADriverContextP ctx,
+                          const struct i965_surface *src_surface,
+                          const VARectangle *src_rect,
+                          struct i965_surface *dst_surface,
+                          const VARectangle *dst_rect)
+{
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    struct i965_post_processing_context *pp_context = i965->pp_context;
+    int fourcc = pp_get_surface_fourcc(ctx, dst_surface);
+
+    if (fourcc == VA_FOURCC('N', 'V', '1', '2')) {
+        i965_post_processing_internal(ctx, i965->pp_context,
+                                      src_surface,
+                                      src_rect,
+                                      dst_surface,
+                                      dst_rect,
+                                      PP_RGBX_LOAD_SAVE_NV12,
+                                      NULL);
+    } else {
+        assert(0);
+        return VA_STATUS_ERROR_UNKNOWN;
+    }
+
+    intel_batchbuffer_flush(pp_context->batch);
+
+    return VA_STATUS_SUCCESS;
+}
+
+static VAStatus
 i965_image_pl3_processing(VADriverContextP ctx,
                           const struct i965_surface *src_surface,
                           const VARectangle *src_rect,
@@ -4212,7 +4287,16 @@ i965_image_processing(VADriverContextP ctx,
                                                dst_surface,
                                                dst_rect);
             break;
-
+        case VA_FOURCC('B', 'G', 'R', 'A'):
+        case VA_FOURCC('B', 'G', 'R', 'X'):
+        case VA_FOURCC('R', 'G', 'B', 'A'):
+        case VA_FOURCC('R', 'G', 'B', 'X'):
+            status = i965_image_pl1_rgbx_processing(ctx,
+                                               src_surface,
+                                               src_rect,
+                                               dst_surface,
+                                               dst_rect);
+            break;
         default:
             status = VA_STATUS_ERROR_UNIMPLEMENTED;
             break;
diff --git a/src/i965_post_processing.h b/src/i965_post_processing.h
index 7b01176..0ea87d2 100755
--- a/src/i965_post_processing.h
+++ b/src/i965_post_processing.h
@@ -51,10 +51,10 @@ enum
     PP_PL3_LOAD_SAVE_PA,
     PP_PA_LOAD_SAVE_NV12,
     PP_PA_LOAD_SAVE_PL3,
+    PP_RGBX_LOAD_SAVE_NV12,
+    NUM_PP_MODULES,
 };
 
-#define NUM_PP_MODULES                  13
-
 struct i965_post_processing_context;
 
 struct pp_load_save_context