From: Paul Brook <paul@codesourcery.com>
Date: Fri, 28 Mar 2008 18:13:52 +0000 (+0000)
Subject: 2008-03-28  Paul Brook  <paul@codesourcery.com>
X-Git-Tag: cgen-snapshot-20080801~538
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=1c48d59fe926140fa6a3811635f065389b6068a1;p=pf3gnuchains%2Fpf3gnuchains4x.git

2008-03-28  Paul Brook  <paul@codesourcery.com>

	gas/
	* config/tc-arm.c (parse_neon_mov): Parse register before immediate
	to avoid spurious symbols.
---

diff --git a/gas/ChangeLog b/gas/ChangeLog
index d5a6e2b56d..8d1b4a2af1 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2008-03-28  Paul Brook  <paul@codesourcery.com>
+
+	* config/tc-arm.c (parse_neon_mov): Parse register before immediate
+	to avoid spurious symbols.
+
 2008-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 
 	* config/tc-m68k.c (md_convert_frag_1): Replace as_fatal with
@@ -21,15 +26,15 @@
 	instructions. And call yyerror when comparing PREG with
 	DREG.
 	(check_macfunc_option): New.
- 	(check_macfuncs): Check option by calling check_macfunc_option.
+	(check_macfuncs): Check option by calling check_macfunc_option.
 	Fix comparison always true warnings.  Both scalar instructions
 	of vector instruction must share the same mode option.  Only allow
 	option mode at the end of the second instruction of the vector.
- 	(asm_1): Check option by calling check_macfunc_option.
+	(asm_1): Check option by calling check_macfunc_option.
 
 	* config/bfin-parse.y (check_macfunc_option): Allow (IU)
 	option for multiply and multiply-accumulate to data register
- 	instruction.
+	instruction.
 	(check_macfuncs): Don't check if accumulator matches the data register
 	here.
 	(assign_macfunc): Check if accumulator matches the
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 3fbbdeb3a9..8965356ac6 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -5209,16 +5209,6 @@ parse_neon_mov (char **str, int *which_operand)
               inst.operands[i].present = 1;
             }
         }
-      else if (parse_qfloat_immediate (&ptr, &inst.operands[i].imm) == SUCCESS)
-          /* Case 2: VMOV<c><q>.<dt> <Qd>, #<float-imm>
-             Case 3: VMOV<c><q>.<dt> <Dd>, #<float-imm>
-             Case 10: VMOV.F32 <Sd>, #<imm>
-             Case 11: VMOV.F64 <Dd>, #<imm>  */
-        inst.operands[i].immisfloat = 1;
-      else if (parse_big_immediate (&ptr, i) == SUCCESS)
-          /* Case 2: VMOV<c><q>.<dt> <Qd>, #<imm>
-             Case 3: VMOV<c><q>.<dt> <Dd>, #<imm>  */
-        ;
       else if ((val = arm_typed_reg_parse (&ptr, REG_TYPE_NSDQ, &rtype,
                                            &optype)) != FAIL)
         {
@@ -5258,6 +5248,16 @@ parse_neon_mov (char **str, int *which_operand)
               inst.operands[i++].present = 1;
             }
         }
+      else if (parse_qfloat_immediate (&ptr, &inst.operands[i].imm) == SUCCESS)
+          /* Case 2: VMOV<c><q>.<dt> <Qd>, #<float-imm>
+             Case 3: VMOV<c><q>.<dt> <Dd>, #<float-imm>
+             Case 10: VMOV.F32 <Sd>, #<imm>
+             Case 11: VMOV.F64 <Dd>, #<imm>  */
+        inst.operands[i].immisfloat = 1;
+      else if (parse_big_immediate (&ptr, i) == SUCCESS)
+          /* Case 2: VMOV<c><q>.<dt> <Qd>, #<imm>
+             Case 3: VMOV<c><q>.<dt> <Dd>, #<imm>  */
+        ;
       else
         {
           first_error (_("expected <Rm> or <Dm> or <Qm> operand"));