From: Imre Deak Date: Fri, 27 Mar 2015 11:07:33 +0000 (+0200) Subject: drm/i915/bxt: map GTT as uncached X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=2a073f89435771409a21930b78f182d8cb5c5941;p=sagit-ice-cold%2Fkernel_xiaomi_msm8998.git drm/i915/bxt: map GTT as uncached On Broxton per specification the GTT has to be mapped as uncached. This was caught by the PTE write readback warning, which showed a corrupted PTE value with using the current write-combine mapping. v2: - add comment explaining how the problem with WC mapping manifests (Daniel) Signed-off-by: Imre Deak Reviewed-by: Antti Koskipää Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 22ad9c388121..f48d8454f0ef 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -2253,7 +2253,17 @@ static int ggtt_probe_common(struct drm_device *dev, gtt_phys_addr = pci_resource_start(dev->pdev, 0) + (pci_resource_len(dev->pdev, 0) / 2); - dev_priv->gtt.gsm = ioremap_wc(gtt_phys_addr, gtt_size); + /* + * On BXT writes larger than 64 bit to the GTT pagetable range will be + * dropped. For WC mappings in general we have 64 byte burst writes + * when the WC buffer is flushed, so we can't use it, but have to + * resort to an uncached mapping. The WC issue is easily caught by the + * readback check when writing GTT PTE entries. + */ + if (IS_BROXTON(dev)) + dev_priv->gtt.gsm = ioremap_nocache(gtt_phys_addr, gtt_size); + else + dev_priv->gtt.gsm = ioremap_wc(gtt_phys_addr, gtt_size); if (!dev_priv->gtt.gsm) { DRM_ERROR("Failed to map the gtt page table\n"); return -ENOMEM;