From: Ludovic Barre Date: Tue, 17 Jul 2018 09:56:27 +0000 (+0200) Subject: pinctrl: stm32: add syscfg mask parameter X-Git-Tag: v4.19-rc1~163^2~19 X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=2e25a9cbdf8cc300baa8f5eb5130152a6c25dd0a;p=uclinux-h8%2Flinux.git pinctrl: stm32: add syscfg mask parameter This patch adds mask parameter to define IRQ mux field. This field could vary depend of IRQ mux selection register. To avoid backward compatibility, the drivers set the legacy value by default. Signed-off-by: Ludovic Barre Acked-by: Alexandre TORGUE Signed-off-by: Linus Walleij --- diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c index 111225ec075c..a9bec6e6fdd1 100644 --- a/drivers/pinctrl/stm32/pinctrl-stm32.c +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c @@ -46,6 +46,8 @@ #define STM32_GPIO_PINS_PER_BANK 16 #define STM32_GPIO_IRQ_LINE 16 +#define SYSCFG_IRQMUX_MASK GENMASK(3, 0) + #define gpio_range_to_bank(chip) \ container_of(chip, struct stm32_gpio_bank, range) @@ -1054,6 +1056,7 @@ static int stm32_pctrl_dt_setup_irq(struct platform_device *pdev, struct device *dev = &pdev->dev; struct regmap *rm; int offset, ret, i; + int mask, mask_width; parent = of_irq_find_parent(np); if (!parent) @@ -1073,12 +1076,21 @@ static int stm32_pctrl_dt_setup_irq(struct platform_device *pdev, if (ret) return ret; + ret = of_property_read_u32_index(np, "st,syscfg", 2, &mask); + if (ret) + mask = SYSCFG_IRQMUX_MASK; + + mask_width = fls(mask); + for (i = 0; i < STM32_GPIO_PINS_PER_BANK; i++) { struct reg_field mux; mux.reg = offset + (i / 4) * 4; - mux.lsb = (i % 4) * 4; - mux.msb = mux.lsb + 3; + mux.lsb = (i % 4) * mask_width; + mux.msb = mux.lsb + mask_width - 1; + + dev_dbg(dev, "irqmux%d: reg:%#x, lsb:%d, msb:%d\n", + i, mux.reg, mux.lsb, mux.msb); pctl->irqmux[i] = devm_regmap_field_alloc(dev, rm, mux); if (IS_ERR(pctl->irqmux[i]))