From: Tharun Kumar P Date: Tue, 4 Apr 2023 17:16:11 +0000 (+0530) Subject: spi: mchp-pci1xxxx: Fix length of SPI transactions not set properly in driver X-Git-Tag: v6.4-rc1~124^2~12^2~2 X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=35c8c5e503a82e0a4bf251d32096211eba8c2be6;p=tomoyo%2Ftomoyo-test1.git spi: mchp-pci1xxxx: Fix length of SPI transactions not set properly in driver In pci1xxxx_spi_transfer_one API, length of SPI transaction gets cleared by setting of length mask. Set length of transaction only after masking length field. Fixes: 1cc0cbea7167 ("spi: microchip: pci1xxxx: Add driver for SPI controller of PCI1XXXX PCIe switch") Signed-off-by: Tharun Kumar P Link: https://lore.kernel.org/r/20230404171613.1336093-2-tharunkumar.pasumarthi@microchip.com Signed-off-by: Mark Brown --- diff --git a/drivers/spi/spi-pci1xxxx.c b/drivers/spi/spi-pci1xxxx.c index 1c5731641a04..419a1d3a5c2e 100644 --- a/drivers/spi/spi-pci1xxxx.c +++ b/drivers/spi/spi-pci1xxxx.c @@ -199,8 +199,9 @@ static int pci1xxxx_spi_transfer_one(struct spi_controller *spi_ctlr, else regval &= ~SPI_MST_CTL_MODE_SEL; - regval |= ((clkdiv << 5) | SPI_FORCE_CE | (len << 8)); + regval |= ((clkdiv << 5) | SPI_FORCE_CE); regval &= ~SPI_MST_CTL_CMD_LEN_MASK; + regval |= (len << 8); writel(regval, par->reg_base + SPI_MST_CTL_REG_OFFSET(p->hw_inst)); regval = readl(par->reg_base +