From: unknown <motooka@MOTOOKA2.asiapacific.hpqcorp.net>
Date: Wed, 14 Jan 2015 10:51:09 +0000 (+0900)
Subject: vga edge reset adjustment
X-Git-Tag: ppu-work-160808~21^2~85
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=3c04f259a874cf09632c25ea1ecf80008f0c2ddf;p=motonesfpga%2Fmotonesfpga.git

vga edge reset adjustment
---

diff --git a/tools/qt_proj_test5/qt_proj_test5.vhd b/tools/qt_proj_test5/qt_proj_test5.vhd
index 3dd2cec..52be8f1 100644
--- a/tools/qt_proj_test5/qt_proj_test5.vhd
+++ b/tools/qt_proj_test5/qt_proj_test5.vhd
@@ -196,8 +196,7 @@ begin
     dbg_cpu_clk <= vga_clk;
     dbg_ppu_addr <= "00000" & dbg_nes_x;
     dbg_d_io <= "000" & dbg_plt_addr;
-    --dbg_ppu_data <= dbg_plt_data;
-    dbg_ppu_data <= "00" & vram_a;
+    dbg_ppu_data <= dbg_plt_data;
     dbg_addr <= "00" & v_addr;
     dbg_ppu_status <= vram_ad;
     dbg_ppu_scrl_x(0) <= ale;
@@ -357,34 +356,34 @@ end;
                         ppu_set(16#2007#, 16#10#);
                     elsif (plt_step_cnt = 10) then
                         ppu_set(16#2007#, 16#20#);
---
---                    elsif (plt_step_cnt = 12) then
---                        ppu_set(16#2007#, 16#0f#);
---                    elsif (plt_step_cnt = 14) then
---                        ppu_set(16#2007#, 16#04#);
---                    elsif (plt_step_cnt = 16) then
---                        ppu_set(16#2007#, 16#14#);
---                    elsif (plt_step_cnt = 18) then
---                        ppu_set(16#2007#, 16#24#);
--- 
---                    elsif (plt_step_cnt = 20) then
---                        ppu_set(16#2007#, 16#0f#);
---                    elsif (plt_step_cnt = 22) then
---                        ppu_set(16#2007#, 16#08#);
---                    elsif (plt_step_cnt = 24) then
---                        ppu_set(16#2007#, 16#18#);
---                    elsif (plt_step_cnt = 26) then
---                        ppu_set(16#2007#, 16#28#);
--- 
---                    elsif (plt_step_cnt = 28) then
---                        ppu_set(16#2007#, 16#0f#);
---                    elsif (plt_step_cnt = 30) then
---                        ppu_set(16#2007#, 16#0c#);
---                    elsif (plt_step_cnt = 32) then
---                        ppu_set(16#2007#, 16#1c#);
---                    elsif (plt_step_cnt = 34) then
---                        ppu_set(16#2007#, 16#2c#);
--- 
+
+                    elsif (plt_step_cnt = 12) then
+                        ppu_set(16#2007#, 16#0f#);
+                    elsif (plt_step_cnt = 14) then
+                        ppu_set(16#2007#, 16#04#);
+                    elsif (plt_step_cnt = 16) then
+                        ppu_set(16#2007#, 16#14#);
+                    elsif (plt_step_cnt = 18) then
+                        ppu_set(16#2007#, 16#24#);
+ 
+                    elsif (plt_step_cnt = 20) then
+                        ppu_set(16#2007#, 16#0f#);
+                    elsif (plt_step_cnt = 22) then
+                        ppu_set(16#2007#, 16#08#);
+                    elsif (plt_step_cnt = 24) then
+                        ppu_set(16#2007#, 16#18#);
+                    elsif (plt_step_cnt = 26) then
+                        ppu_set(16#2007#, 16#28#);
+ 
+                    elsif (plt_step_cnt = 28) then
+                        ppu_set(16#2007#, 16#0f#);
+                    elsif (plt_step_cnt = 30) then
+                        ppu_set(16#2007#, 16#0c#);
+                    elsif (plt_step_cnt = 32) then
+                        ppu_set(16#2007#, 16#1c#);
+                    elsif (plt_step_cnt = 34) then
+                        ppu_set(16#2007#, 16#2c#);
+ 
                     else
                         ppu_clr;
                         if (plt_step_cnt > 10) then
diff --git a/tools/qt_proj_test5/simulation/modelsim/qt_proj_test5_run_msim_gate_vhdl.do b/tools/qt_proj_test5/simulation/modelsim/qt_proj_test5_run_msim_gate_vhdl.do
index 610ce62..d691161 100644
--- a/tools/qt_proj_test5/simulation/modelsim/qt_proj_test5_run_msim_gate_vhdl.do
+++ b/tools/qt_proj_test5/simulation/modelsim/qt_proj_test5_run_msim_gate_vhdl.do
@@ -38,12 +38,10 @@ add wave -label rd_n sim:/testbench_qt_proj_test5/sim_board/dbg_ppu_scrl_x(1)
 add wave -label wr_n sim:/testbench_qt_proj_test5/sim_board/dbg_ppu_scrl_x(2)
 add wave -label nt0_ce_n sim:/testbench_qt_proj_test5/sim_board/dbg_ppu_scrl_x(3)
 
-add wave  -radix hex -label vram_a sim:/testbench_qt_proj_test5/sim_board/dbg_ppu_data
-add wave  -radix hex -label vram_ad sim:/testbench_qt_proj_test5/sim_board/dbg_ppu_status
 add wave  -radix hex -label v_addr sim:/testbench_qt_proj_test5/sim_board/dbg_addr
-
-#add wave  -radix hex -label plt_addr sim:/testbench_qt_proj_test5/sim_board/dbg_d_io
-#add wave  -radix hex -label plt_data sim:/testbench_qt_proj_test5/sim_board/dbg_ppu_data
+add wave  -radix hex -label vram_ad sim:/testbench_qt_proj_test5/sim_board/dbg_ppu_status
+add wave  -radix hex -label plt_addr sim:/testbench_qt_proj_test5/sim_board/dbg_d_io
+add wave  -radix hex -label plt_data sim:/testbench_qt_proj_test5/sim_board/dbg_ppu_data
 
 
 
@@ -85,9 +83,7 @@ view signals
 ###run 10 us
 run 3 us
 
-run 20 us
+run 100 us
 
 wave zoom full
 
-#run 100 us
-
diff --git a/tools/qt_proj_test5/vga.vhd b/tools/qt_proj_test5/vga.vhd
index f5d99ca..b5f5593 100644
--- a/tools/qt_proj_test5/vga.vhd
+++ b/tools/qt_proj_test5/vga.vhd
@@ -430,7 +430,7 @@ constant asize        : integer := 14;
 --constant HSCAN_MAX    : integer := 341;
 constant HSCAN_MAX    : integer := 321;
 constant VSCAN_MAX    : integer := 262;
-constant HSCAN        : integer := 256;
+constant HSCAN        : integer := 257;
 constant VSCAN        : integer := 240;
 --constant HSCAN_NEXT_START    : integer := 320;
 --constant HSCAN_NEXT_EXTRA    : integer := 336;