From: Geert Uytterhoeven Date: Mon, 6 Mar 2023 09:06:33 +0000 (+0100) Subject: drm/msm/dpu: Fix bit-shifting UB in DPU_HW_VER() macro X-Git-Tag: v6.4-rc1~31^2~11^2~33^2~5 X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=4760be481dc075cd13f95f4650f5d5b53b4b336d;p=tomoyo%2Ftomoyo-test1.git drm/msm/dpu: Fix bit-shifting UB in DPU_HW_VER() macro With gcc-5 and CONFIG_UBSAN_SHIFT=y: drivers/gpu/drm/msm/msm_mdss.c: In function 'msm_mdss_enable': drivers/gpu/drm/msm/msm_mdss.c:296:2: error: case label does not reduce to an integer constant case DPU_HW_VER_800: ^ drivers/gpu/drm/msm/msm_mdss.c:299:2: error: case label does not reduce to an integer constant case DPU_HW_VER_810: ^ drivers/gpu/drm/msm/msm_mdss.c:300:2: error: case label does not reduce to an integer constant case DPU_HW_VER_900: ^ This happens because for major revisions 8 or greather, the non-sign bit of the major revision number is shifted into bit 31 of a signed integer, which is undefined behavior. Fix this by casting the major revision number to unsigned int. Fixes: efcd0107727c4f04 ("drm/msm/dpu: add support for SM8550") Fixes: 4a352c2fc15aec1e ("drm/msm/dpu: Introduce SC8280XP") Fixes: 100d7ef6995d1f86 ("drm/msm/dpu: add support for SM8450") Signed-off-by: Geert Uytterhoeven Reviewed-by: Randy Dunlap Reviewed-by: Rob Clark Patchwork: https://patchwork.freedesktop.org/patch/525152/ Link: https://lore.kernel.org/r/20230306090633.65918-1-geert+renesas@glider.be Signed-off-by: Dmitry Baryshkov --- diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h index 6b8fe0b7e467..2f532543848c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h @@ -19,8 +19,9 @@ */ #define MAX_BLOCKS 12 -#define DPU_HW_VER(MAJOR, MINOR, STEP) (((MAJOR & 0xF) << 28) |\ - ((MINOR & 0xFFF) << 16) |\ +#define DPU_HW_VER(MAJOR, MINOR, STEP) \ + ((((unsigned int)MAJOR & 0xF) << 28) | \ + ((MINOR & 0xFFF) << 16) | \ (STEP & 0xFFFF)) #define DPU_HW_MAJOR(rev) ((rev) >> 28)