From: Evan Cheng Date: Fri, 28 Mar 2008 17:49:06 +0000 (+0000) Subject: Backing out 48911 for now. It's breaking stuff. X-Git-Tag: android-x86-6.0-r1~1003^2~29233 X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=4db4f1ce7e238a49fa387c72ed3ad62c79107754;p=android-x86%2Fexternal-llvm.git Backing out 48911 for now. It's breaking stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48922 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 6c82f1c801f..baa41f9a6cf 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -748,12 +748,6 @@ static bool regIsPICBase(unsigned BaseReg, MachineRegisterInfo &MRI) { } return isPICBase; } - -/// isGVStub - Return true if the GV requires an extra load to get the -/// real address. -static inline bool isGVStub(GlobalValue *GV, X86TargetMachine &TM) { - return TM.getSubtarget().GVRequiresExtraLoad(GV, TM, false); -} bool X86InstrInfo::isReallyTriviallyReMaterializable(MachineInstr *MI) const { switch (MI->getOpcode()) { @@ -775,9 +769,7 @@ bool X86InstrInfo::isReallyTriviallyReMaterializable(MachineInstr *MI) const { if (MI->getOperand(1).isReg() && MI->getOperand(2).isImm() && MI->getOperand(3).isReg() && MI->getOperand(3).getReg() == 0 && - (MI->getOperand(4).isCPI() || - (MI->getOperand(4).isGlobal() && - isGVStub(MI->getOperand(4).getGlobal(), TM)))) { + MI->getOperand(4).isCPI()) { unsigned BaseReg = MI->getOperand(1).getReg(); if (BaseReg == 0) return true; @@ -839,9 +831,13 @@ bool X86InstrInfo::isInvariantLoad(MachineInstr *MI) const { // Loads from constant pools are trivially invariant. if (MO.isCPI()) return true; - - if (MO.isGlobal()) - return isGVStub(MO.getGlobal(), TM); + + if (MO.isGlobal()) { + if (TM.getSubtarget().GVRequiresExtraLoad(MO.getGlobal(), + TM, false)) + return true; + return false; + } // If this is a load from an invariant stack slot, the load is a constant. if (MO.isFI()) {