From: Francis Visoiu Mistrih <francisvm@yahoo.com>
Date: Tue, 9 Jan 2018 11:33:22 +0000 (+0000)
Subject: [MIR] Add support for the frame-destroy MachineInstr flag
X-Git-Tag: android-x86-7.1-r4~6486
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=4e1cf66e6fb6d5c17c21ff317c58bdaa353e06c1;p=android-x86%2Fexternal-llvm.git

[MIR] Add support for the frame-destroy MachineInstr flag

We are printing / parsing the `frame-setup` MachineInstr flag but not
the `frame-destroy` one.

Differential Revision: https://reviews.llvm.org/D41509

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322071 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/docs/MIRLangRef.rst b/docs/MIRLangRef.rst
index 1176435c876..84bd6021f29 100644
--- a/docs/MIRLangRef.rst
+++ b/docs/MIRLangRef.rst
@@ -365,12 +365,17 @@ machine instructions.
 Instruction Flags
 ^^^^^^^^^^^^^^^^^
 
-The flag ``frame-setup`` can be specified before the instruction's name:
+The flag ``frame-setup`` or ``frame-destroy`` can be specified before the
+instruction's name:
 
 .. code-block:: text
 
     %fp = frame-setup ADDXri %sp, 0, 0
 
+.. code-block:: text
+
+    %x21, %x20 = frame-destroy LDPXi %sp
+
 .. _registers:
 
 Registers
diff --git a/lib/CodeGen/MIRParser/MILexer.cpp b/lib/CodeGen/MIRParser/MILexer.cpp
index 6adb7f1288d..397fdbfe5ee 100644
--- a/lib/CodeGen/MIRParser/MILexer.cpp
+++ b/lib/CodeGen/MIRParser/MILexer.cpp
@@ -211,6 +211,7 @@ static MIToken::TokenKind getIdentifierKind(StringRef Identifier) {
       .Case("renamable", MIToken::kw_renamable)
       .Case("tied-def", MIToken::kw_tied_def)
       .Case("frame-setup", MIToken::kw_frame_setup)
+      .Case("frame-destroy", MIToken::kw_frame_destroy)
       .Case("debug-location", MIToken::kw_debug_location)
       .Case("same_value", MIToken::kw_cfi_same_value)
       .Case("offset", MIToken::kw_cfi_offset)
diff --git a/lib/CodeGen/MIRParser/MILexer.h b/lib/CodeGen/MIRParser/MILexer.h
index 0204d549d5d..275f92985f7 100644
--- a/lib/CodeGen/MIRParser/MILexer.h
+++ b/lib/CodeGen/MIRParser/MILexer.h
@@ -63,6 +63,7 @@ struct MIToken {
     kw_renamable,
     kw_tied_def,
     kw_frame_setup,
+    kw_frame_destroy,
     kw_debug_location,
     kw_cfi_same_value,
     kw_cfi_offset,
diff --git a/lib/CodeGen/MIRParser/MIParser.cpp b/lib/CodeGen/MIRParser/MIParser.cpp
index 1a78ae3aad0..4fa84c7bbd9 100644
--- a/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/lib/CodeGen/MIRParser/MIParser.cpp
@@ -925,6 +925,9 @@ bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
   if (Token.is(MIToken::kw_frame_setup)) {
     Flags |= MachineInstr::FrameSetup;
     lex();
+  } else if (Token.is(MIToken::kw_frame_destroy)) {
+    Flags |= MachineInstr::FrameDestroy;
+    lex();
   }
   if (Token.isNot(MIToken::Identifier))
     return error("expected a machine instruction");
diff --git a/lib/CodeGen/MIRPrinter.cpp b/lib/CodeGen/MIRPrinter.cpp
index f91cca6e4e5..cd3ec2ef353 100644
--- a/lib/CodeGen/MIRPrinter.cpp
+++ b/lib/CodeGen/MIRPrinter.cpp
@@ -670,6 +670,9 @@ void MIPrinter::print(const MachineInstr &MI) {
     OS << " = ";
   if (MI.getFlag(MachineInstr::FrameSetup))
     OS << "frame-setup ";
+  else if (MI.getFlag(MachineInstr::FrameDestroy))
+    OS << "frame-destroy ";
+
   OS << TII->getName(MI.getOpcode());
   if (I < E)
     OS << ' ';
diff --git a/test/CodeGen/AArch64/arm64-csldst-mmo.ll b/test/CodeGen/AArch64/arm64-csldst-mmo.ll
index c69779add59..9916499bf00 100644
--- a/test/CodeGen/AArch64/arm64-csldst-mmo.ll
+++ b/test/CodeGen/AArch64/arm64-csldst-mmo.ll
@@ -11,7 +11,7 @@
 ; CHECK: Before post-MI-sched:
 ; CHECK-LABEL: # Machine code for function test1:
 ; CHECK: SU(2):   STRWui %wzr
-; CHECK: SU(3):   %x21, %x20 = LDPXi %sp
+; CHECK: SU(3):   %x21, %x20 = LDPXi %sp, 2; flags: FrameDestroy
 ; CHECK:  Predecessors:
 ; CHECK-NEXT:   SU(0): Out
 ; CHECK-NEXT:   SU(0): Out
diff --git a/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir b/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
index 5ae4df45943..65a852fd860 100644
--- a/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
+++ b/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
@@ -30,6 +30,7 @@ body: |
     ; CHECK: frame-setup PUSH64r %rax
     frame-setup PUSH64r %rax, implicit-def %rsp, implicit %rsp
     CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax
-    %rdx = POP64r implicit-def %rsp, implicit %rsp
+    ; CHECK: %rdx = frame-destroy POP64r
+    %rdx = frame-destroy POP64r implicit-def %rsp, implicit %rsp
     RETQ %eax
 ...