From: Lennert Buytenhek Date: Fri, 23 May 2008 06:34:42 +0000 (+0200) Subject: [ARM] Orion: DRAM mapping granularity is 64KiB, not 16MiB X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=4fc338e38f08f0a91e35ab386abae48eb033dbb2;p=sagit-ice-cold%2Fkernel_xiaomi_msm8998.git [ARM] Orion: DRAM mapping granularity is 64KiB, not 16MiB The DRAM base address and size fields in the CPU's MBUS bridge have 64KiB granularity, instead of the currently used 16MiB. Since all of the currently supported MBUS peripherals support 64KiB granularity as well, this patch changes the Orion address map code to stop rounding base addresses down and sizes up to multiples of 16MiB. Found by Ke Wei . Signed-off-by: Lennert Buytenhek Acked-by: Russell King --- diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c index 5ffbac9e1570..267e9f960a54 100644 --- a/arch/arm/mach-orion5x/addr-map.c +++ b/arch/arm/mach-orion5x/addr-map.c @@ -155,8 +155,8 @@ void __init orion5x_setup_cpu_mbus_bridge(void) w = &orion5x_mbus_dram_info.cs[cs++]; w->cs_index = i; w->mbus_attr = 0xf & ~(1 << i); - w->base = base & 0xff000000; - w->size = (size | 0x00ffffff) + 1; + w->base = base & 0xffff0000; + w->size = (size | 0x0000ffff) + 1; } } orion5x_mbus_dram_info.num_cs = cs;