From: Bill Buzbee Date: Thu, 18 Jun 2009 23:01:22 +0000 (-0700) Subject: Neglected to rebuild template/out/* and mterp/out* in #4536 X-Git-Tag: android-x86-2.2~856 X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=5abc6e77ff476217f0871d800977ef50fc000d00;p=android-x86%2Fdalvik.git Neglected to rebuild template/out/* and mterp/out* in #4536 --- diff --git a/vm/compiler/template/out/CompilerTemplateAsm-armv5te.S b/vm/compiler/template/out/CompilerTemplateAsm-armv5te.S index adafb4828..c1b47330f 100644 --- a/vm/compiler/template/out/CompilerTemplateAsm-armv5te.S +++ b/vm/compiler/template/out/CompilerTemplateAsm-armv5te.S @@ -895,7 +895,7 @@ dvmCompiler_TEMPLATE_FLOAT_TO_INT_VFP: * Generic 32bit-to-32bit floating point unary operation. Provide an * "instr" line that specifies an instruction that performs "s1 = op s0". * - * For: flot-to-int, int-to-float + * For: float-to-int, int-to-float * * On entry: * r0 = target dalvik register address @@ -941,7 +941,7 @@ dvmCompiler_TEMPLATE_INT_TO_FLOAT_VFP: * Generic 32bit-to-32bit floating point unary operation. Provide an * "instr" line that specifies an instruction that performs "s1 = op s0". * - * For: flot-to-int, int-to-float + * For: float-to-int, int-to-float * * On entry: * r0 = target dalvik register address diff --git a/vm/mterp/out/InterpAsm-armv4t.S b/vm/mterp/out/InterpAsm-armv4t.S index 21fb884a6..5dba929cd 100644 --- a/vm/mterp/out/InterpAsm-armv4t.S +++ b/vm/mterp/out/InterpAsm-armv4t.S @@ -201,12 +201,6 @@ unspecified registers or condition codes. */ #include "../common/asm-constants.h" -/* - * Power of 2 width in bits of the hash table size. - * for ex: 9 -> 512, 10-> 1024, etc. -#define JIT_PROF_TAB_WIDTH 12 -#define JIT_PROF_TAB_LSHIFT (32 - JIT_PROF_TAB_WIDTH) -#defnie JIT_PROF_TAB_THRESH_RESET 255 /* File: armv5te/platform.S */ /* diff --git a/vm/mterp/out/InterpAsm-armv5te-vfp.S b/vm/mterp/out/InterpAsm-armv5te-vfp.S index 55a157de9..7412f29f8 100644 --- a/vm/mterp/out/InterpAsm-armv5te-vfp.S +++ b/vm/mterp/out/InterpAsm-armv5te-vfp.S @@ -201,12 +201,6 @@ unspecified registers or condition codes. */ #include "../common/asm-constants.h" -/* - * Power of 2 width in bits of the hash table size. - * for ex: 9 -> 512, 10-> 1024, etc. -#define JIT_PROF_TAB_WIDTH 12 -#define JIT_PROF_TAB_LSHIFT (32 - JIT_PROF_TAB_WIDTH) -#defnie JIT_PROF_TAB_THRESH_RESET 255 /* File: armv5te/platform.S */ /* diff --git a/vm/mterp/out/InterpAsm-armv5te.S b/vm/mterp/out/InterpAsm-armv5te.S index 68ae10d0c..8264164a4 100644 --- a/vm/mterp/out/InterpAsm-armv5te.S +++ b/vm/mterp/out/InterpAsm-armv5te.S @@ -201,12 +201,6 @@ unspecified registers or condition codes. */ #include "../common/asm-constants.h" -/* - * Power of 2 width in bits of the hash table size. - * for ex: 9 -> 512, 10-> 1024, etc. -#define JIT_PROF_TAB_WIDTH 12 -#define JIT_PROF_TAB_LSHIFT (32 - JIT_PROF_TAB_WIDTH) -#defnie JIT_PROF_TAB_THRESH_RESET 255 /* File: armv5te/platform.S */ /*