From: Alex Deucher Date: Mon, 8 Nov 2010 16:56:41 +0000 (-0500) Subject: r600c: properly align mipmaps to group size X-Git-Tag: android-x86-2.2~638 X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=5b15b5f4a8fffa07d8051e6cd4cd0a6c9288fc9f;p=android-x86%2Fexternal-mesa.git r600c: properly align mipmaps to group size fixes: https://bugs.freedesktop.org/show_bug.cgi?id=31400 --- diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c index 40544860b3b..1047dfae0b3 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c @@ -251,9 +251,9 @@ GLboolean radeonInitContext(radeonContextPtr radeon, radeon->texture_rect_row_align = 512; radeon->texture_compressed_row_align = 512; } else { - radeon->texture_row_align = 256; - radeon->texture_rect_row_align = 256; - radeon->texture_compressed_row_align = 256; + radeon->texture_row_align = radeon->radeonScreen->group_bytes; + radeon->texture_rect_row_align = radeon->radeonScreen->group_bytes; + radeon->texture_compressed_row_align = radeon->radeonScreen->group_bytes; } } else if (IS_R200_CLASS(radeon->radeonScreen) || IS_R100_CLASS(radeon->radeonScreen)) { diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index 43ebc810939..450e33ef134 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -1138,6 +1138,8 @@ radeonCreateScreen( __DRIscreen *sPriv ) else screen->chip_flags |= RADEON_CLASS_R600; + /* set group bytes for r6xx+ */ + screen->group_bytes = 256; screen->cpp = dri_priv->bpp / 8; screen->AGPMode = dri_priv->AGPMode; @@ -1382,7 +1384,8 @@ radeonCreateScreen2(__DRIscreen *sPriv) else screen->chip_flags |= RADEON_CLASS_R600; - /* r6xx+ tiling */ + /* r6xx+ tiling, default to 256 group bytes */ + screen->group_bytes = 256; if (IS_R600_CLASS(screen) && (sPriv->drm_version.minor >= 6)) { ret = radeonGetParam(sPriv, RADEON_INFO_TILE_CONFIG, &temp); if (ret)