From: Rémi Denis-Courmont Date: Tue, 12 Jan 2021 10:45:05 +0000 (+0200) Subject: target/arm: generalize 2-stage page-walk condition X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=7879460a6149ed5e80c29cac85449191d9c5754a;p=qmiga%2Fqemu.git target/arm: generalize 2-stage page-walk condition The stage_1_mmu_idx() already effectively keeps track of which translation regimes have two stages. Don't hard-code another test. Signed-off-by: Rémi Denis-Courmont Reviewed-by: Richard Henderson Message-id: 20210112104511.36576-13-remi.denis.courmont@huawei.com Signed-off-by: Peter Maydell --- diff --git a/target/arm/helper.c b/target/arm/helper.c index 521f85a695..75166a2158 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -12160,11 +12160,11 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, target_ulong *page_size, ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs) { - if (mmu_idx == ARMMMUIdx_E10_0 || - mmu_idx == ARMMMUIdx_E10_1 || - mmu_idx == ARMMMUIdx_E10_1_PAN) { + ARMMMUIdx s1_mmu_idx = stage_1_mmu_idx(mmu_idx); + + if (mmu_idx != s1_mmu_idx) { /* Call ourselves recursively to do the stage 1 and then stage 2 - * translations. + * translations if mmu_idx is a two-stage regime. */ if (arm_feature(env, ARM_FEATURE_EL2)) { hwaddr ipa; @@ -12172,9 +12172,8 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, int ret; ARMCacheAttrs cacheattrs2 = {}; - ret = get_phys_addr(env, address, access_type, - stage_1_mmu_idx(mmu_idx), &ipa, attrs, - prot, page_size, fi, cacheattrs); + ret = get_phys_addr(env, address, access_type, s1_mmu_idx, &ipa, + attrs, prot, page_size, fi, cacheattrs); /* If S1 fails or S2 is disabled, return early. */ if (ret || regime_translation_disabled(env, ARMMMUIdx_Stage2)) {