From: sato_tiff <sato_tiff@24ea1065-a21e-4ca1-99c9-f5125deb0858>
Date: Wed, 24 Dec 2008 17:30:02 +0000 (+0000)
Subject: cpu_read, ppu_read timing を 0.5.1 にときに戻す, write_wait パラメータを追加
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=7b5852c83a1462b944336c3d196d432b5b0146a6;p=unagi%2Fold-svn-converted.git

cpu_read, ppu_read timing を 0.5.1 にときに戻す, write_wait パラメータを追加

git-svn-id: svn+ssh://svn.osdn.net/svnroot/unagi@209 24ea1065-a21e-4ca1-99c9-f5125deb0858
---

diff --git a/client/trunk/reader_hongkongfc.c b/client/trunk/reader_hongkongfc.c
index 063597b..6356535 100644
--- a/client/trunk/reader_hongkongfc.c
+++ b/client/trunk/reader_hongkongfc.c
@@ -80,23 +80,10 @@ static inline void address_set(long address, int cpu_open)
 	}
 }
 
-static const int BUS_CONTROL_PPU_READ = (
-	(0 << BITNUM_PPU_OUTPUT) |
-	(1 << BITNUM_PPU_RW) |
-	(0 << BITNUM_PPU_SELECT) |
-	(1 << BITNUM_WRITEDATA_OUTPUT) |
-	(0 << BITNUM_WRITEDATA_LATCH) |
-	(0 << BITNUM_CPU_M2) |
-	(1 << BITNUM_CPU_RW)
-);
 static inline u8 data_port_get(long address, int bus)
 {
-	//CPU bus open
-	address_set(address, ADDRESS_CPU_OPEN);
+	address_set(address, 0);
 	port_control_write(DATA_SELECT_BREAK_DATA << BITNUM_CONTROL_DATA_SELECT, PORT_CONTROL_WRITE);
-	if(bus == BUS_CONTROL_PPU_READ){
-		data_port_latch(DATA_SELECT_CONTROL, BUS_CONTROL_PPU_READ);
-	}
 	int s = DATA_SELECT_READ << BITNUM_CONTROL_DATA_SELECT;
 	s = bit_set(s, BITNUM_CONTROL_DATA_LATCH);
 	port_control_write(s, PORT_CONTROL_READ);
@@ -125,6 +112,15 @@ static const int BUS_CONTROL_CPU_READ = (
 	(1 << BITNUM_CPU_M2) |
 	(1 << BITNUM_CPU_RW)
 );
+static const int BUS_CONTROL_PPU_READ = (
+	(0 << BITNUM_PPU_OUTPUT) |
+	(1 << BITNUM_PPU_RW) |
+	(0 << BITNUM_PPU_SELECT) |
+	(1 << BITNUM_WRITEDATA_OUTPUT) |
+	(0 << BITNUM_WRITEDATA_LATCH) |
+	(0 << BITNUM_CPU_M2) |
+	(1 << BITNUM_CPU_RW)
+);
 //static const int BUS_CONTROL_BUS_STANDBY = BUS_CONTROL_CPU_READ; //¥¨¥é¡¼¤Ë¤Ê¤ë
 #define BUS_CONTROL_BUS_STANDBY BUS_CONTROL_CPU_READ
 /*
@@ -149,12 +145,10 @@ static void hk_cpu_read(long address, long length, u8 *data)
 {
 	//fc bus ½é´ü²½
 	data_port_latch(DATA_SELECT_CONTROL, BUS_CONTROL_CPU_READ);
-	while(length != 0){
-		//data_port_getÆâÉô address_set ¤Ç bus open
 		//A15 ¤òȿž¤·¡¢ /ROMCS ¤Ë¤·¤¿¤â¤Î¤òÅϤ¹
-		*data = data_port_get(address ^ ADDRESS_MASK_A15, BUS_CONTROL_CPU_READ);
-		//bus close, A15 ¤òÀè¤ËÀßÄê
-		address_set(address, ADDRESS_CPU_CLOSE);
+	address ^= ADDRESS_MASK_A15;
+	while(length != 0){
+		*data = data_port_get(address, BUS_CONTROL_CPU_READ);
 		address++;
 		data++;
 		length--;
@@ -163,19 +157,18 @@ static void hk_cpu_read(long address, long length, u8 *data)
 
 static void hk_ppu_read(long address, long length, u8 *data)
 {
-	data_port_latch(DATA_SELECT_CONTROL, BUS_CONTROL_BUS_STANDBY);
+	data_port_latch(DATA_SELECT_CONTROL, BUS_CONTROL_PPU_READ);
 	address &= ADDRESS_MASK_A0toA12; //PPU charcter data area mask
 	address |= ADDRESS_MASK_A15; //CPU area disk
 	while(length != 0){
 		*data = data_port_get(address, BUS_CONTROL_PPU_READ);
-		data_port_latch(DATA_SELECT_CONTROL, BUS_CONTROL_BUS_STANDBY);
 		address++;
 		data++;
 		length--;
 	}
 }
 
-static void hk_cpu_6502_write(long address, long data)
+static void hk_cpu_6502_write(long address, long data, long wait_msec)
 {
 	int c = BUS_CONTROL_BUS_STANDBY;
 	//Á´¤Æ¤Î¥Ð¥¹¤ò»ß¤á¤ë
@@ -194,8 +187,10 @@ static void hk_cpu_6502_write(long address, long data)
 		address_set(address & ADDRESS_MASK_A0toA14, ADDRESS_CPU_OPEN);
 	}
 	c = bit_clear(c, BITNUM_CPU_RW);
+	data_port_latch(DATA_SELECT_CONTROL, c);
 	c = bit_set(c, BITNUM_CPU_M2);
 	data_port_latch(DATA_SELECT_CONTROL, c);
+	wait(wait_msec);
 	//3 H->L mapper: data write enable
 	c = bit_clear(c, BITNUM_CPU_M2);
 	data_port_latch(DATA_SELECT_CONTROL, c);