From: Dimitry Andric Date: Mon, 18 Dec 2017 18:45:37 +0000 (+0000) Subject: Fix inconsistent line endings in ARCDisassembler.cpp. NFC. X-Git-Tag: android-x86-7.1-r4~7045 X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=826e27c6e021eb681f4e962496276c22926f0e7b;p=android-x86%2Fexternal-llvm.git Fix inconsistent line endings in ARCDisassembler.cpp. NFC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321006 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARC/Disassembler/ARCDisassembler.cpp b/lib/Target/ARC/Disassembler/ARCDisassembler.cpp index 82199d858c0..dd181767d81 100644 --- a/lib/Target/ARC/Disassembler/ARCDisassembler.cpp +++ b/lib/Target/ARC/Disassembler/ARCDisassembler.cpp @@ -273,9 +273,9 @@ static DecodeStatus DecodeMoveHRegInstruction(MCInst &Inst, uint64_t Insn, const void *Decoder) { DEBUG(dbgs() << "Decoding MOV_S h-register\n"); using Field = decltype(Insn); - Field h = fieldFromInstruction(Insn, 5, 3) | - (fieldFromInstruction(Insn, 0, 2) << 3); - Field g = fieldFromInstruction(Insn, 8, 3) | + Field h = fieldFromInstruction(Insn, 5, 3) | + (fieldFromInstruction(Insn, 0, 2) << 3); + Field g = fieldFromInstruction(Insn, 8, 3) | (fieldFromInstruction(Insn, 3, 2) << 3); auto DecodeRegisterOrImm = [&Inst, Address, Decoder](Field RegNum,