From: Sandeep Panda Date: Thu, 1 Sep 2016 11:23:47 +0000 (+0530) Subject: clk: msm: mdss: update PLL configuration to clear precalibrated values X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=8a27dbc430e7281a04de30568e55528a15858d0e;p=sagit-ice-cold%2Fkernel_xiaomi_msm8998.git clk: msm: mdss: update PLL configuration to clear precalibrated values Before going for full PLL enable sequence, we need to clear out the override bit and precalibrated values of VCO_TUNE and KVCO_CODE, as these registers might be storing values for old VCO rate. This will cause the DSI PLL to be in a bad state and hence PLL unlock errors might occur during use case like resolution switch. So always clear the precalibrated values first in PLL configuration sequence. Change-Id: I407920d63b4600b610794141e5b7ceb5a33980c1 Signed-off-by: Sandeep Panda --- diff --git a/drivers/clk/msm/mdss/mdss-dsi-pll-8996-util.c b/drivers/clk/msm/mdss/mdss-dsi-pll-8996-util.c index f6c85cf8d9a4..5f779ec9bcc3 100644 --- a/drivers/clk/msm/mdss/mdss-dsi-pll-8996-util.c +++ b/drivers/clk/msm/mdss/mdss-dsi-pll-8996-util.c @@ -685,6 +685,10 @@ static void pll_db_commit_8996(struct mdss_pll_resources *pll, MDSS_PLL_REG_W(pll_base, DSIPHY_CMN_CTRL_1, 0); wmb(); /* make sure register committed */ + MDSS_PLL_REG_W(pll_base, DSIPHY_PLL_PLL_VCO_TUNE, 0); + MDSS_PLL_REG_W(pll_base, DSIPHY_PLL_KVCO_CODE, 0); + wmb(); /* make sure register committed */ + data = pdb->in.dsiclk_sel; /* set dsiclk_sel = 1 */ MDSS_PLL_REG_W(pll_base, DSIPHY_CMN_CLK_CFG1, data);