From: Krzysztof Parzyszek <kparzysz@codeaurora.org>
Date: Thu, 22 Dec 2016 19:21:20 +0000 (+0000)
Subject: Add the DAG mutation interface to the software pipeliner
X-Git-Tag: android-x86-7.1-r4~22846
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=8bfcb04e0e86bc2e190536c2b960d031bf082b1b;p=android-x86%2Fexternal-llvm.git

Add the DAG mutation interface to the software pipeliner


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290360 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/include/llvm/Target/TargetSubtargetInfo.h b/include/llvm/Target/TargetSubtargetInfo.h
index c5585c3ae70..bf4331383cb 100644
--- a/include/llvm/Target/TargetSubtargetInfo.h
+++ b/include/llvm/Target/TargetSubtargetInfo.h
@@ -191,6 +191,12 @@ public:
       std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {
   }
 
+  // \brief Provide an ordered list of schedule DAG mutations for the machine
+  // pipeliner.
+  virtual void getSMSMutations(
+      std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {
+  }
+
   // For use with PostRAScheduling: get the minimum optimization level needed
   // to enable post-RA scheduling.
   virtual CodeGenOpt::Level getOptLevelToEnablePostRAScheduler() const {
diff --git a/lib/CodeGen/MachinePipeliner.cpp b/lib/CodeGen/MachinePipeliner.cpp
index d9528cdc25b..43a18099d39 100644
--- a/lib/CodeGen/MachinePipeliner.cpp
+++ b/lib/CodeGen/MachinePipeliner.cpp
@@ -89,6 +89,7 @@
 #include "llvm/CodeGen/RegisterPressure.h"
 #include "llvm/CodeGen/ScheduleDAG.h"
 #include "llvm/CodeGen/ScheduleDAGInstrs.h"
+#include "llvm/CodeGen/ScheduleDAGMutation.h"
 #include "llvm/IR/Attributes.h"
 #include "llvm/IR/DebugLoc.h"
 #include "llvm/MC/MCInstrItineraries.h"
@@ -256,6 +257,9 @@ class SwingSchedulerDAG : public ScheduleDAGInstrs {
   /// must be deleted when the pass is finished.
   SmallPtrSet<MachineInstr *, 4> NewMIs;
 
+  /// Ordered list of DAG postprocessing steps.
+  std::vector<std::unique_ptr<ScheduleDAGMutation>> Mutations;
+
   /// Helper class to implement Johnson's circuit finding algorithm.
   class Circuits {
     std::vector<SUnit> &SUnits;
@@ -287,7 +291,9 @@ public:
                     const RegisterClassInfo &rci)
       : ScheduleDAGInstrs(*P.MF, P.MLI, false), Pass(P), MII(0),
         Scheduled(false), Loop(L), LIS(lis), RegClassInfo(rci),
-        Topo(SUnits, &ExitSU) {}
+        Topo(SUnits, &ExitSU) {
+    P.MF->getSubtarget().getSMSMutations(Mutations);
+  }
 
   void schedule() override;
   void finishBlock() override;
@@ -370,6 +376,10 @@ public:
     return 0;
   }
 
+  void addMutation(std::unique_ptr<ScheduleDAGMutation> Mutation) {
+    Mutations.push_back(std::move(Mutation));
+  }
+
 private:
   void addLoopCarriedDependences(AliasAnalysis *AA);
   void updatePhiDependences();
@@ -438,6 +448,7 @@ private:
   bool canUseLastOffsetValue(MachineInstr *MI, unsigned &BasePos,
                              unsigned &OffsetPos, unsigned &NewBase,
                              int64_t &NewOffset);
+  void postprocessDAG();
 };
 
 /// A NodeSet contains a set of SUnit DAG nodes with additional information
@@ -847,6 +858,7 @@ void SwingSchedulerDAG::schedule() {
   addLoopCarriedDependences(AA);
   updatePhiDependences();
   Topo.InitDAGTopologicalSorting();
+  postprocessDAG();
   changeDependences();
   DEBUG({
     for (unsigned su = 0, e = SUnits.size(); su != e; ++su)
@@ -3474,6 +3486,11 @@ bool SwingSchedulerDAG::isLoopCarriedOrder(SUnit *Source, const SDep &Dep,
   return true;
 }
 
+void SwingSchedulerDAG::postprocessDAG() {
+  for (auto &M : Mutations)
+    M->apply(this);
+}
+
 /// Try to schedule the node at the specified StartCycle and continue
 /// until the node is schedule or the EndCycle is reached.  This function
 /// returns true if the node is scheduled.  This routine may search either