From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Fri, 11 Dec 2020 18:25:04 +0000 (-0800)
Subject: Merge tag 'pinctrl-v5.10-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw... 
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=94801e5c6d461045726e1563ba2369ef7ce21dbf;p=uclinux-h8%2Flinux.git

Merge tag 'pinctrl-v5.10-3' of git://git./linux/kernel/git/linusw/linux-pinctrl

Pull pin control fixes from Linus Walleij:
 "Here is a late set of pin control fixes for v5.10, most concern some
  minor and major issues found in the Intel drivers. Some are so hairy
  that I have no idea what is going on there, but luckily the maintainer
  knows what's up.

  We also have an interesting fix for AMD, which makes AMD-based laptops
  more stable IIUC.

  Summary:

   - Fix up some SPI group and a register offset on Intel Jasperlake

   - Set default bias on Intel Merrifield

   - Preserve debouncing on Intel Baytrail

   - Stop .set_type() irqchip callback in the AMD driver from fiddling
     with the debounce filter

   - Fix access to GPIO banks that are pass-thru on the Aspeed

   - Fix a fix for the Intel pin control driver to disable Rx/Tx when
     requesting a UART line as GPIO"

* tag 'pinctrl-v5.10-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: intel: Actually disable Tx and Rx buffers on GPIO request
  pinctrl: aspeed: Fix GPIO requests on pass-through banks
  pinctrl: amd: remove debounce filter setting in IRQ type setting
  pinctrl: baytrail: Avoid clearing debounce value when turning it off
  pinctrl: merrifield: Set default bias in case no particular value given
  pinctrl: jasperlake: Fix HOSTSW_OWN offset
  pinctrl: jasperlake: Unhide SPI group of pins
---

94801e5c6d461045726e1563ba2369ef7ce21dbf