From: Chris Lattner Date: Wed, 25 Apr 2007 00:00:45 +0000 (+0000) Subject: Be more careful about folding op(x, undef) when we have vector operands. X-Git-Tag: android-x86-6.0-r1~1003^2~35230 X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=964dd860542aa12bea93474dc159b4a7e3a6a9c1;p=android-x86%2Fexternal-llvm.git Be more careful about folding op(x, undef) when we have vector operands. This fixes CodeGen/X86/2007-04-24-VectorCrash.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36413 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index e3296aa1582..d1232f270da 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1294,13 +1294,8 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, double F; uint64_t I; } u1; - union { - double F; - int64_t I; - } u2; u1.F = C1; - u2.F = C2; - if (u2.I < 0) // Sign bit of RHS set? + if (int64_t(DoubleToBits(C2)) < 0) // Sign bit of RHS set? u1.I |= 1ULL << 63; // Set the sign bit of the LHS. else u1.I &= (1ULL << 63)-1; // Clear the sign bit of the LHS. @@ -1336,7 +1331,11 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, case ISD::SREM: case ISD::SRL: case ISD::SHL: - return getConstant(0, VT); // fold op(undef, arg2) -> 0 + if (!MVT::isVector(VT)) + return getConstant(0, VT); // fold op(undef, arg2) -> 0 + // For vectors, we can't easily build an all zero vector, just return + // the LHS. + return N2; } } } @@ -1363,9 +1362,17 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, case ISD::AND: case ISD::SRL: case ISD::SHL: - return getConstant(0, VT); // fold op(arg1, undef) -> 0 + if (!MVT::isVector(VT)) + return getConstant(0, VT); // fold op(arg1, undef) -> 0 + // For vectors, we can't easily build an all zero vector, just return + // the LHS. + return N1; case ISD::OR: - return getConstant(MVT::getIntVTBitMask(VT), VT); + if (!MVT::isVector(VT)) + return getConstant(MVT::getIntVTBitMask(VT), VT); + // For vectors, we can't easily build an all one vector, just return + // the LHS. + return N1; case ISD::SRA: return N1; }