From: Tilmann Scheller <t.scheller@samsung.com>
Date: Thu, 11 Sep 2014 10:33:39 +0000 (+0000)
Subject: [ARM] Add Thumb-2 code size optimization regression test for LSL (register).
X-Git-Tag: android-x86-7.1-r4~57647
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=993f84c9bccc1a219e35058e731a864684f72502;p=android-x86%2Fexternal-llvm.git

[ARM] Add Thumb-2 code size optimization regression test for LSL (register).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217579 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/ARM/thumb2-size-opt.ll b/test/CodeGen/ARM/thumb2-size-opt.ll
index 12280a91c8f..4d9c0603e85 100644
--- a/test/CodeGen/ARM/thumb2-size-opt.ll
+++ b/test/CodeGen/ARM/thumb2-size-opt.ll
@@ -55,3 +55,12 @@ entry:
   %shl = shl i32 %a, 13
   ret i32 %shl
 }
+
+define i32 @lsl-reg(i32 %a, i32 %b) nounwind readnone {
+; CHECK-LABEL: "lsl-reg":
+; CHECK: lsl.w r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} @ encoding: [{{0x..,0x..,0x..,0x..}}]
+; CHECK-OPT: lsls r{{[0-7]}}, r{{[0-7]}}  @ encoding: [{{0x..,0x..}}]
+entry:
+  %shl = shl i32 %a, %b
+  ret i32 %shl
+}