From: Måns Rullgård <mans@mansr.com>
Date: Wed, 23 Sep 2009 13:52:56 +0000 (+0000)
Subject: ARM: NEON optimised int32_to_float_fmul_scalar
X-Git-Tag: android-x86-4.4-r1~25236
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=9bda7f3063c0ddab193bb737ce3e5c37b6e84298;p=android-x86%2Fexternal-ffmpeg.git

ARM: NEON optimised int32_to_float_fmul_scalar

Originally committed as revision 20000 to svn://svn.ffmpeg.org/ffmpeg/trunk
---

diff --git a/libavcodec/arm/dsputil_neon.c b/libavcodec/arm/dsputil_neon.c
index bfea27ff13..2ec50a1004 100644
--- a/libavcodec/arm/dsputil_neon.c
+++ b/libavcodec/arm/dsputil_neon.c
@@ -169,6 +169,8 @@ void ff_sv_fmul_scalar_4_neon(float *dst, const float **vp, float mul,
                               int len);
 void ff_butterflies_float_neon(float *v1, float *v2, int len);
 float ff_scalarproduct_float_neon(const float *v1, const float *v2, int len);
+void ff_int32_to_float_fmul_scalar_neon(float *dst, const int *src,
+                                        float mul, int len);
 
 void ff_float_to_int16_neon(int16_t *, const float *, long);
 void ff_float_to_int16_interleave_neon(int16_t *, const float **, long, int);
@@ -284,6 +286,7 @@ void ff_dsputil_init_neon(DSPContext *c, AVCodecContext *avctx)
     c->vector_fmul_scalar = ff_vector_fmul_scalar_neon;
     c->butterflies_float = ff_butterflies_float_neon;
     c->scalarproduct_float = ff_scalarproduct_float_neon;
+    c->int32_to_float_fmul_scalar = ff_int32_to_float_fmul_scalar_neon;
 
     c->vector_fmul_sv_scalar[0] = ff_vector_fmul_sv_scalar_2_neon;
     c->vector_fmul_sv_scalar[1] = ff_vector_fmul_sv_scalar_4_neon;
diff --git a/libavcodec/arm/dsputil_neon_s.S b/libavcodec/arm/dsputil_neon_s.S
index b9779354fa..8fd055abbd 100644
--- a/libavcodec/arm/dsputil_neon_s.S
+++ b/libavcodec/arm/dsputil_neon_s.S
@@ -1023,3 +1023,31 @@ function ff_scalarproduct_float_neon, export=1
 NOVFP   vmov.32         r0,  d0[0]
         bx              lr
         .endfunc
+
+function ff_int32_to_float_fmul_scalar_neon, export=1
+VFP     vdup.32         q0,  d0[0]
+VFP     len     .req    r2
+NOVFP   vdup.32         q0,  r2
+NOVFP   len     .req    r3
+
+        vld1.32         {q1},[r1,:128]!
+        vcvt.f32.s32    q3,  q1
+        vld1.32         {q2},[r1,:128]!
+        vcvt.f32.s32    q8,  q2
+1:      subs            len, len, #8
+        pld             [r1, #16]
+        vmul.f32        q9,  q3,  q0
+        vmul.f32        q10, q8,  q0
+        beq             2f
+        vld1.32         {q1},[r1,:128]!
+        vcvt.f32.s32    q3,  q1
+        vld1.32         {q2},[r1,:128]!
+        vcvt.f32.s32    q8,  q2
+        vst1.32         {q9}, [r0,:128]!
+        vst1.32         {q10},[r0,:128]!
+        b               1b
+2:      vst1.32         {q9}, [r0,:128]!
+        vst1.32         {q10},[r0,:128]!
+        bx              lr
+        .unreq  len
+        .endfunc