From: Andrew Cagney <cagney@redhat.com>
Date: Fri, 13 Sep 2002 17:58:22 +0000 (+0000)
Subject: Fri Sep 13 07:42:09 2002  Andrew Cagney  <cagney@redhat.com>
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=9d67e1ce5453369302576b49a6ebc6048d2bb71e;p=pf3gnuchains%2Fpf3gnuchains3x.git

Fri Sep 13 07:42:09 2002  Andrew Cagney  <cagney@redhat.com>

	* mips-tdep.c (mips_get_saved_register): Re-hack using
 	frame_register_unwind.
---

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 655027ec47..85319f9ad7 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,8 @@
+Fri Sep 13 07:42:09 2002  Andrew Cagney  <cagney@redhat.com>
+
+	* mips-tdep.c (mips_get_saved_register): Re-hack using
+ 	frame_register_unwind.
+
 2002-09-12  Joel Brobecker  <brobecker@gnat.com>
 
 	* gdbarch.sh (NAME_OF_MALLOC): New variable in the architecture
diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index 1474393beb..268894a318 100644
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -5426,59 +5426,47 @@ mips_coerce_float_to_double (struct type *formal, struct type *actual)
 
 static void
 mips_get_saved_register (char *raw_buffer,
-			 int *optimized,
+			 int *optimizedp,
 			 CORE_ADDR *addrp,
 			 struct frame_info *frame,
 			 int regnum,
-			 enum lval_type *lval)
+			 enum lval_type *lvalp)
 {
-  CORE_ADDR addr;
+  CORE_ADDR addrx;
+  enum lval_type lvalx;
+  int optimizedx;
+  int realnum;
 
   if (!target_has_registers)
     error ("No registers.");
 
-  /* Normal systems don't optimize out things with register numbers.  */
-  if (optimized != NULL)
-    *optimized = 0;
-  addr = find_saved_register (frame, regnum);
-  if (addr != 0)
+  /* Make certain that all needed parameters are present.  */
+  if (addrp == NULL)
+    addrp = &addrx;
+  if (lvalp == NULL)
+    lvalp = &lvalx;
+  if (optimizedp == NULL)
+    optimizedp = &optimizedx;
+  frame_register_unwind (get_next_frame (frame), regnum, optimizedp, lvalp,
+			 addrp, &realnum, raw_buffer);
+  /* FIXME: cagney/2002-09-13: This is just so bad.  The MIPS should
+     have a pseudo register range that correspons to the ABI's, rather
+     than the ISA's, view of registers.  These registers would then
+     implicitly describe their size and hence could be used without
+     the below munging.  */
+  if ((*lvalp) == lval_memory)
     {
-      if (lval != NULL)
-	*lval = lval_memory;
-      if (regnum == SP_REGNUM)
-	{
-	  if (raw_buffer != NULL)
-	    {
-	      /* Put it back in target format.  */
-	      store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
-			     (LONGEST) addr);
-	    }
-	  if (addrp != NULL)
-	    *addrp = 0;
-	  return;
-	}
       if (raw_buffer != NULL)
 	{
-	  LONGEST val;
 	  if (regnum < 32)
-	    /* Only MIPS_SAVED_REGSIZE bytes of GP registers are
-               saved. */
-	    val = read_memory_integer (addr, MIPS_SAVED_REGSIZE);
-	  else
-	    val = read_memory_integer (addr, REGISTER_RAW_SIZE (regnum));
-	  store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), val);
+	    {
+	      /* Only MIPS_SAVED_REGSIZE bytes of GP registers are
+		 saved. */
+	      LONGEST val = read_memory_integer ((*addrp), MIPS_SAVED_REGSIZE);
+	      store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), val);
+	    }
 	}
     }
-  else
-    {
-      if (lval != NULL)
-	*lval = lval_register;
-      addr = REGISTER_BYTE (regnum);
-      if (raw_buffer != NULL)
-	read_register_gen (regnum, raw_buffer);
-    }
-  if (addrp != NULL)
-    *addrp = addr;
 }
 
 /* Immediately after a function call, return the saved pc.