From: Maciej W. Rozycki Date: Mon, 8 Oct 2007 16:41:35 +0000 (+0000) Subject: opcodes/: X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=a2117b14ac00831c89a53efc89ef5d72ca01bd21;p=pf3gnuchains%2Fpf3gnuchains3x.git opcodes/: * opcodes/mips-dis.c (mips_cp0_names_r3000): New definition. (mips_cp0_names_r4000): Likewise. (mips_arch_choices): Link to the above as appropriate. gas/testsuite/: * gas/mips/cp0-names-r3000.d: New test for R3000 CP0 symbolic disassembly. * gas/mips/cp0-names-r4000.d: New test for R4000/R4400 symbolic CP0 disassembly. * mips/mips.exp: Run the new tests. --- diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 9f5a021c77..c02f4bbb5a 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,4 +1,12 @@ -2007-10-01 Maciej W. Rozycki +2007-10-08 Maciej W. Rozycki + + * gas/mips/cp0-names-r3000.d: New test for R3000 CP0 symbolic + disassembly. + * gas/mips/cp0-names-r4000.d: New test for R4000/R4400 symbolic + CP0 disassembly. + * mips/mips.exp: Run the new tests. + +2007-10-08 Maciej W. Rozycki * gas/mips/at-1.d, gas/mips/at-2.l: New tests to check the ".set at=REG" directive. diff --git a/gas/testsuite/gas/mips/cp0-names-r3000.d b/gas/testsuite/gas/mips/cp0-names-r3000.d new file mode 100644 index 0000000000..e0820fca76 --- /dev/null +++ b/gas/testsuite/gas/mips/cp0-names-r3000.d @@ -0,0 +1,43 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,cp0-names=r3000 +#name: MIPS CP0 register disassembly (r3000) +#as: -32 -march=r3000 +#source: cp0-names.s + +# Check objdump's handling of -M cp0-names=foo options. + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 40800000 mtc0 \$0,c0_index +[0-9a-f]+ <[^>]*> 40800800 mtc0 \$0,c0_random +[0-9a-f]+ <[^>]*> 40801000 mtc0 \$0,c0_entrylo +[0-9a-f]+ <[^>]*> 40801800 mtc0 \$0,\$3 +[0-9a-f]+ <[^>]*> 40802000 mtc0 \$0,c0_context +[0-9a-f]+ <[^>]*> 40802800 mtc0 \$0,\$5 +[0-9a-f]+ <[^>]*> 40803000 mtc0 \$0,\$6 +[0-9a-f]+ <[^>]*> 40803800 mtc0 \$0,\$7 +[0-9a-f]+ <[^>]*> 40804000 mtc0 \$0,c0_badvaddr +[0-9a-f]+ <[^>]*> 40804800 mtc0 \$0,\$9 +[0-9a-f]+ <[^>]*> 40805000 mtc0 \$0,c0_entryhi +[0-9a-f]+ <[^>]*> 40805800 mtc0 \$0,\$11 +[0-9a-f]+ <[^>]*> 40806000 mtc0 \$0,c0_sr +[0-9a-f]+ <[^>]*> 40806800 mtc0 \$0,c0_cause +[0-9a-f]+ <[^>]*> 40807000 mtc0 \$0,c0_epc +[0-9a-f]+ <[^>]*> 40807800 mtc0 \$0,c0_prid +[0-9a-f]+ <[^>]*> 40808000 mtc0 \$0,\$16 +[0-9a-f]+ <[^>]*> 40808800 mtc0 \$0,\$17 +[0-9a-f]+ <[^>]*> 40809000 mtc0 \$0,\$18 +[0-9a-f]+ <[^>]*> 40809800 mtc0 \$0,\$19 +[0-9a-f]+ <[^>]*> 4080a000 mtc0 \$0,\$20 +[0-9a-f]+ <[^>]*> 4080a800 mtc0 \$0,\$21 +[0-9a-f]+ <[^>]*> 4080b000 mtc0 \$0,\$22 +[0-9a-f]+ <[^>]*> 4080b800 mtc0 \$0,\$23 +[0-9a-f]+ <[^>]*> 4080c000 mtc0 \$0,\$24 +[0-9a-f]+ <[^>]*> 4080c800 mtc0 \$0,\$25 +[0-9a-f]+ <[^>]*> 4080d000 mtc0 \$0,\$26 +[0-9a-f]+ <[^>]*> 4080d800 mtc0 \$0,\$27 +[0-9a-f]+ <[^>]*> 4080e000 mtc0 \$0,\$28 +[0-9a-f]+ <[^>]*> 4080e800 mtc0 \$0,\$29 +[0-9a-f]+ <[^>]*> 4080f000 mtc0 \$0,\$30 +[0-9a-f]+ <[^>]*> 4080f800 mtc0 \$0,\$31 + \.\.\. diff --git a/gas/testsuite/gas/mips/cp0-names-r4000.d b/gas/testsuite/gas/mips/cp0-names-r4000.d new file mode 100644 index 0000000000..2ca4fe0f98 --- /dev/null +++ b/gas/testsuite/gas/mips/cp0-names-r4000.d @@ -0,0 +1,43 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric +#name: MIPS CP0 register disassembly +#as: -32 -march=r4000 +#source: cp0-names.s + +# Check objdump's handling of -M cp0-names=foo options. + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 40800000 mtc0 \$0,c0_index +[0-9a-f]+ <[^>]*> 40800800 mtc0 \$0,c0_random +[0-9a-f]+ <[^>]*> 40801000 mtc0 \$0,c0_entrylo0 +[0-9a-f]+ <[^>]*> 40801800 mtc0 \$0,c0_entrylo1 +[0-9a-f]+ <[^>]*> 40802000 mtc0 \$0,c0_context +[0-9a-f]+ <[^>]*> 40802800 mtc0 \$0,c0_pagemask +[0-9a-f]+ <[^>]*> 40803000 mtc0 \$0,c0_wired +[0-9a-f]+ <[^>]*> 40803800 mtc0 \$0,\$7 +[0-9a-f]+ <[^>]*> 40804000 mtc0 \$0,c0_badvaddr +[0-9a-f]+ <[^>]*> 40804800 mtc0 \$0,c0_count +[0-9a-f]+ <[^>]*> 40805000 mtc0 \$0,c0_entryhi +[0-9a-f]+ <[^>]*> 40805800 mtc0 \$0,c0_compare +[0-9a-f]+ <[^>]*> 40806000 mtc0 \$0,c0_sr +[0-9a-f]+ <[^>]*> 40806800 mtc0 \$0,c0_cause +[0-9a-f]+ <[^>]*> 40807000 mtc0 \$0,c0_epc +[0-9a-f]+ <[^>]*> 40807800 mtc0 \$0,c0_prid +[0-9a-f]+ <[^>]*> 40808000 mtc0 \$0,c0_config +[0-9a-f]+ <[^>]*> 40808800 mtc0 \$0,c0_lladdr +[0-9a-f]+ <[^>]*> 40809000 mtc0 \$0,c0_watchlo +[0-9a-f]+ <[^>]*> 40809800 mtc0 \$0,c0_watchhi +[0-9a-f]+ <[^>]*> 4080a000 mtc0 \$0,c0_xcontext +[0-9a-f]+ <[^>]*> 4080a800 mtc0 \$0,\$21 +[0-9a-f]+ <[^>]*> 4080b000 mtc0 \$0,\$22 +[0-9a-f]+ <[^>]*> 4080b800 mtc0 \$0,\$23 +[0-9a-f]+ <[^>]*> 4080c000 mtc0 \$0,\$24 +[0-9a-f]+ <[^>]*> 4080c800 mtc0 \$0,\$25 +[0-9a-f]+ <[^>]*> 4080d000 mtc0 \$0,c0_ecc +[0-9a-f]+ <[^>]*> 4080d800 mtc0 \$0,c0_cacheerr +[0-9a-f]+ <[^>]*> 4080e000 mtc0 \$0,c0_taglo +[0-9a-f]+ <[^>]*> 4080e800 mtc0 \$0,c0_taghi +[0-9a-f]+ <[^>]*> 4080f000 mtc0 \$0,c0_errorepc +[0-9a-f]+ <[^>]*> 4080f800 mtc0 \$0,\$31 + \.\.\. diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index 344e62b7e0..30efee8954 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -696,6 +696,11 @@ if { [istarget mips*-*-vxworks*] } { run_dump_test "fpr-names-64" run_dump_test "cp0-names-numeric" + run_dump_test "cp0-names-r3000" + run_dump_test "cp0-names-r4000" \ + { { {name} {(r4000)} } { {objdump} {-M cp0-names=r4000} } } + run_dump_test "cp0-names-r4000" \ + { { {name} {(r4400)} } { {objdump} {-M cp0-names=r4400} } } run_dump_test "cp0-names-mips32" run_dump_test "cp0-names-mips32r2" run_dump_test "cp0-names-mips64" diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index b69100a2c4..99b51e79e2 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2007-10-08 Maciej W. Rozycki + + * opcodes/mips-dis.c (mips_cp0_names_r3000): New definition. + (mips_cp0_names_r4000): Likewise. + (mips_arch_choices): Link to the above as appropriate. + 2007-10-08 Nick Clifton * configure.in (SHARED_DEPENDENCIES): Change non-cygwin dependency diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index 2c42b49f51..186646a5ac 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -124,6 +124,30 @@ static const char * const mips_cp0_names_numeric[32] = "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31" }; +static const char * const mips_cp0_names_r3000[32] = +{ + "c0_index", "c0_random", "c0_entrylo", "$3", + "c0_context", "$5", "$6", "$7", + "c0_badvaddr", "$9", "c0_entryhi", "$11", + "c0_sr", "c0_cause", "c0_epc", "c0_prid", + "$16", "$17", "$18", "$19", + "$20", "$21", "$22", "$23", + "$24", "$25", "$26", "$27", + "$28", "$29", "$30", "$31", +}; + +static const char * const mips_cp0_names_r4000[32] = +{ + "c0_index", "c0_random", "c0_entrylo0", "c0_entrylo1", + "c0_context", "c0_pagemask", "c0_wired", "$7", + "c0_badvaddr", "c0_count", "c0_entryhi", "c0_compare", + "c0_sr", "c0_cause", "c0_epc", "c0_prid", + "c0_config", "c0_lladdr", "c0_watchlo", "c0_watchhi", + "c0_xcontext", "$21", "$22", "$23", + "$24", "$25", "c0_ecc", "c0_cacheerr", + "c0_taglo", "c0_taghi", "c0_errorepc", "$31", +}; + static const char * const mips_cp0_names_mips3264[32] = { "c0_index", "c0_random", "c0_entrylo0", "c0_entrylo1", @@ -346,11 +370,11 @@ const struct mips_arch_choice mips_arch_choices[] = mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, { "r3000", 1, bfd_mach_mips3000, CPU_R3000, ISA_MIPS1, - mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, + mips_cp0_names_r3000, NULL, 0, mips_hwr_names_numeric }, { "r3900", 1, bfd_mach_mips3900, CPU_R3900, ISA_MIPS1, mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, { "r4000", 1, bfd_mach_mips4000, CPU_R4000, ISA_MIPS3, - mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, + mips_cp0_names_r4000, NULL, 0, mips_hwr_names_numeric }, { "r4010", 1, bfd_mach_mips4010, CPU_R4010, ISA_MIPS2, mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, { "vr4100", 1, bfd_mach_mips4100, CPU_VR4100, ISA_MIPS3, @@ -362,7 +386,7 @@ const struct mips_arch_choice mips_arch_choices[] = { "r4300", 1, bfd_mach_mips4300, CPU_R4300, ISA_MIPS3, mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, { "r4400", 1, bfd_mach_mips4400, CPU_R4400, ISA_MIPS3, - mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, + mips_cp0_names_r4000, NULL, 0, mips_hwr_names_numeric }, { "r4600", 1, bfd_mach_mips4600, CPU_R4600, ISA_MIPS3, mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, { "r4650", 1, bfd_mach_mips4650, CPU_R4650, ISA_MIPS3,