From: Atish Patra <atishp@rivosinc.com>
Date: Thu, 3 Mar 2022 18:54:35 +0000 (-0800)
Subject: target/riscv: Define simpler privileged spec version numbering
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=a46d410c5c19fa752d0ba03333e70170b8a6f57a;p=qmiga%2Fqemu.git

target/riscv: Define simpler privileged spec version numbering

Currently, the privileged specification version are defined in
a complex manner for no benefit.

Simplify it by changing it to a simple enum based on.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Message-Id: <20220303185440.512391-2-atishp@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 72f1c9451e..345ec2c773 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -82,8 +82,11 @@ enum {
     RISCV_FEATURE_AIA
 };
 
-#define PRIV_VERSION_1_10_0 0x00011000
-#define PRIV_VERSION_1_11_0 0x00011100
+/* Privileged specification version */
+enum {
+    PRIV_VERSION_1_10_0 = 0,
+    PRIV_VERSION_1_11_0,
+};
 
 #define VEXT_VERSION_1_00_0 0x00010000