From: Chen Qun Date: Fri, 13 Mar 2020 12:32:42 +0000 (+0800) Subject: hw/net/imx_fec: write TGSR and TCSR3 in imx_enet_write() X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=a510d0c1cd5e5cf267f9893368bb1c4ee7ccca19;p=qmiga%2Fqemu.git hw/net/imx_fec: write TGSR and TCSR3 in imx_enet_write() The current code causes clang static code analyzer generate warning: hw/net/imx_fec.c:858:9: warning: Value stored to 'value' is never read value = value & 0x0000000f; ^ ~~~~~~~~~~~~~~~~~~ hw/net/imx_fec.c:864:9: warning: Value stored to 'value' is never read value = value & 0x000000fd; ^ ~~~~~~~~~~~~~~~~~~ According to the definition of the function, the two “value” assignments should be written to registers. Reported-by: Euler Robot Signed-off-by: Chen Qun Message-id: 20200313123242.13236-1-kuhn.chenqun@huawei.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c index 6a124a154a..5c145a8197 100644 --- a/hw/net/imx_fec.c +++ b/hw/net/imx_fec.c @@ -855,13 +855,15 @@ static void imx_enet_write(IMXFECState *s, uint32_t index, uint32_t value) break; case ENET_TGSR: /* implement clear timer flag */ - value = value & 0x0000000f; + s->regs[index] &= ~(value & 0x0000000f); /* all bits W1C */ break; case ENET_TCSR0: case ENET_TCSR1: case ENET_TCSR2: case ENET_TCSR3: - value = value & 0x000000fd; + s->regs[index] &= ~(value & 0x00000080); /* W1C bits */ + s->regs[index] &= ~0x0000007d; /* writable fields */ + s->regs[index] |= (value & 0x0000007d); break; case ENET_TCCR0: case ENET_TCCR1: