From: Ville Syrjälä Date: Wed, 30 Jan 2019 15:51:10 +0000 (+0200) Subject: drm/i915: Don't use the second dbuf slice on icl X-Git-Tag: v5.1-rc1~23^2~21^2~10 X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=ad3e7b824c185125f281d56a9e8f614effcdae91;p=uclinux-h8%2Flinux.git drm/i915: Don't use the second dbuf slice on icl The code managing the dbuf slices is borked and needs some real work to fix. In the meantime let's just stop using the second slice. v2: Drop the change to intel_enabled_dbuf_slices_num() (Mahesh) Cc: Mahesh Kumar Reviewed-by: Imre Deak #v1 Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20190130155110.12918-1-ville.syrjala@linux.intel.com Reviewed-by: Mahesh Kumar --- diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 53b706154c94..ed9786241307 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3822,8 +3822,13 @@ static u16 intel_get_ddb_size(struct drm_i915_private *dev_priv, /* * 12GB/s is maximum BW supported by single DBuf slice. + * + * FIXME dbuf slice code is broken: + * - must wait for planes to stop using the slice before powering it off + * - plane straddling both slices is illegal in multi-pipe scenarios + * - should validate we stay within the hw bandwidth limits */ - if (num_active > 1 || total_data_bw >= GBps(12)) { + if (0 && (num_active > 1 || total_data_bw >= GBps(12))) { ddb->enabled_slices = 2; } else { ddb->enabled_slices = 1;