From: aurel32 Date: Sun, 14 Dec 2008 18:59:08 +0000 (+0000) Subject: target-ppc: remove FPRF optimization X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=b12363e1b7d7454daa21c861290f49de42c2ea71;p=qmiga%2Fqemu.git target-ppc: remove FPRF optimization FPRF optimization is totally broken, remove it. Signed-off-by: Aurelien Jarno git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6033 c046a42c-6fe2-441c-8c8c-71466251a162 --- diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 11a83348a9..1d25c82c61 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -41,7 +41,6 @@ //#define DO_SINGLE_STEP //#define PPC_DEBUG_DISAS //#define DO_PPC_STATISTICS -//#define OPTIMIZE_FPRF_UPDATE /*****************************************************************************/ /* Code translation helpers */ @@ -162,11 +161,6 @@ void ppc_translate_init(void) done_init = 1; } -#if defined(OPTIMIZE_FPRF_UPDATE) -static uint16_t *gen_fprf_buf[OPC_BUF_SIZE]; -static uint16_t **gen_fprf_ptr; -#endif - /* internal defines */ typedef struct DisasContext { struct TranslationBlock *tb; @@ -216,9 +210,6 @@ static always_inline void gen_compute_fprf (TCGv_i64 arg, int set_fprf, int set_ if (set_fprf != 0) { /* This case might be optimized later */ -#if defined(OPTIMIZE_FPRF_UPDATE) - *gen_fprf_ptr++ = gen_opc_ptr; -#endif tcg_gen_movi_i32(t0, 1); gen_helper_compute_fprf(t0, arg, t0); if (unlikely(set_rc)) { @@ -235,17 +226,6 @@ static always_inline void gen_compute_fprf (TCGv_i64 arg, int set_fprf, int set_ tcg_temp_free_i32(t0); } -static always_inline void gen_optimize_fprf (void) -{ -#if defined(OPTIMIZE_FPRF_UPDATE) - uint16_t **ptr; - - for (ptr = gen_fprf_buf; ptr != (gen_fprf_ptr - 1); ptr++) - *ptr = INDEX_op_nop1; - gen_fprf_ptr = gen_fprf_buf; -#endif -} - static always_inline void gen_set_access_type (DisasContext *ctx, int access_type) { if (ctx->access_type != access_type) { @@ -2326,7 +2306,6 @@ GEN_HANDLER(mcrfs, 0x3F, 0x00, 0x02, 0x0063F801, PPC_FLOAT) gen_exception(ctx, POWERPC_EXCP_FPU); return; } - gen_optimize_fprf(); bfa = 4 * (7 - crfS(ctx->opcode)); tcg_gen_shri_i32(cpu_crf[crfD(ctx->opcode)], cpu_fpscr, bfa); tcg_gen_andi_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfD(ctx->opcode)], 0xf); @@ -2340,7 +2319,6 @@ GEN_HANDLER(mffs, 0x3F, 0x07, 0x12, 0x001FF800, PPC_FLOAT) gen_exception(ctx, POWERPC_EXCP_FPU); return; } - gen_optimize_fprf(); gen_reset_fpstatus(); tcg_gen_extu_i32_i64(cpu_fpr[rD(ctx->opcode)], cpu_fpscr); gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], 0, Rc(ctx->opcode) != 0); @@ -2356,7 +2334,6 @@ GEN_HANDLER(mtfsb0, 0x3F, 0x06, 0x02, 0x001FF800, PPC_FLOAT) return; } crb = 31 - crbD(ctx->opcode); - gen_optimize_fprf(); gen_reset_fpstatus(); if (likely(crb != FPSCR_FEX && crb != FPSCR_VX)) { TCGv_i32 t0 = tcg_const_i32(crb); @@ -2378,7 +2355,6 @@ GEN_HANDLER(mtfsb1, 0x3F, 0x06, 0x01, 0x001FF800, PPC_FLOAT) return; } crb = 31 - crbD(ctx->opcode); - gen_optimize_fprf(); gen_reset_fpstatus(); /* XXX: we pretend we can only do IEEE floating-point computations */ if (likely(crb != FPSCR_FEX && crb != FPSCR_VX && crb != FPSCR_NI)) { @@ -2402,7 +2378,6 @@ GEN_HANDLER(mtfsf, 0x3F, 0x07, 0x16, 0x02010000, PPC_FLOAT) gen_exception(ctx, POWERPC_EXCP_FPU); return; } - gen_optimize_fprf(); gen_reset_fpstatus(); t0 = tcg_const_i32(FM(ctx->opcode)); gen_helper_store_fpscr(cpu_fpr[rB(ctx->opcode)], t0); @@ -2427,7 +2402,6 @@ GEN_HANDLER(mtfsfi, 0x3F, 0x06, 0x04, 0x006f0800, PPC_FLOAT) } bf = crbD(ctx->opcode) >> 2; sh = 7 - bf; - gen_optimize_fprf(); gen_reset_fpstatus(); t0 = tcg_const_i64(FPIMM(ctx->opcode) << (4 * sh)); t1 = tcg_const_i32(1 << sh); @@ -7727,9 +7701,6 @@ static always_inline void gen_intermediate_code_internal (CPUState *env, pc_start = tb->pc; gen_opc_end = gen_opc_buf + OPC_MAX_SIZE; -#if defined(OPTIMIZE_FPRF_UPDATE) - gen_fprf_ptr = gen_fprf_buf; -#endif ctx.nip = pc_start; ctx.tb = tb; ctx.exception = POWERPC_EXCP_NONE;