From: Jan Vesely <jan.vesely@rutgers.edu>
Date: Tue, 13 Sep 2016 00:47:37 +0000 (-0400)
Subject: radeon: Don't check DCC on pipe buffers
X-Git-Tag: android-x86-6.0-r2~1194
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=b671909d2799b86fd30ae89a5ad1fe4973250680;p=android-x86%2Fexternal-mesa.git

radeon: Don't check DCC on pipe buffers

Fixes segfaults in EG compute since:
commit 21de3be8e62b2b093569a99550e6356ed2f106b4
radeonsi: fix texture format reinterpretation with DCC

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
---

diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 41fd94b2437..d3a498fb35d 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -1788,9 +1788,10 @@ struct pipe_surface *r600_create_surface_custom(struct pipe_context *pipe,
 	surface->base.u = templ->u;
 	surface->level_info = &rtex->surface.level[templ->u.tex.level];
 
-	vi_dcc_disable_if_incompatible_format(rctx, texture,
-					      templ->u.tex.level,
-					      templ->format);
+	if (texture->target != PIPE_BUFFER)
+		vi_dcc_disable_if_incompatible_format(rctx, texture,
+						      templ->u.tex.level,
+						      templ->format);
 
 	return &surface->base;
 }