From: Andy Shevchenko Date: Fri, 23 Jan 2015 11:54:04 +0000 (+0200) Subject: i2c: designware-pci: no need to provide clk_khz X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=c99d49a964c700ad0bab5c54e2f559fce0487fad;p=sagit-ice-cold%2Fkernel_xiaomi_msm8998.git i2c: designware-pci: no need to provide clk_khz The clk_khz field makes sense only if SS counters are not provided. Since we provide them for Haswell and Baytrail explicitly we may omit the clk_khz parameter. Reviewed-by: Jarkko Nikula Signed-off-by: Andy Shevchenko Signed-off-by: Wolfram Sang --- diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c index 5c6fca70fb76..87f51f50985d 100644 --- a/drivers/i2c/busses/i2c-designware-pcidrv.c +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c @@ -145,7 +145,6 @@ static struct dw_pci_controller dw_pci_controllers[] = { .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, .tx_fifo_depth = 32, .rx_fifo_depth = 32, - .clk_khz = 100000, .functionality = I2C_FUNC_10BIT_ADDR, .scl_sda_cfg = &byt_config, }, @@ -154,7 +153,6 @@ static struct dw_pci_controller dw_pci_controllers[] = { .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, .tx_fifo_depth = 32, .rx_fifo_depth = 32, - .clk_khz = 100000, .functionality = I2C_FUNC_10BIT_ADDR, .scl_sda_cfg = &hsw_config, },