From: Iago Toral Quiroga Date: Wed, 18 Apr 2018 08:50:35 +0000 (+0200) Subject: compiler/nir: add lowering option for 16-bit fmod X-Git-Tag: android-x86-9.0-r1~7911 X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=ca31df6f1fbc2c502644dd7be7424000dc02541c;p=android-x86%2Fexternal-mesa.git compiler/nir: add lowering option for 16-bit fmod And enable it on Intel. v2: - Squash the change to enable this lowering on Intel (Jason) Reviewed-by: Jason Ekstrand --- diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index b6a2ba7ec8c..ee766d5238a 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -2169,6 +2169,7 @@ typedef struct nir_shader_compiler_options { bool lower_fpow; bool lower_fsat; bool lower_fsqrt; + bool lower_fmod16; bool lower_fmod32; bool lower_fmod64; /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */ diff --git a/src/compiler/nir/nir_opt_algebraic.py b/src/compiler/nir/nir_opt_algebraic.py index 3326bbef684..ddd8d40676f 100644 --- a/src/compiler/nir/nir_opt_algebraic.py +++ b/src/compiler/nir/nir_opt_algebraic.py @@ -674,6 +674,7 @@ optimizations = [ (('bcsel', ('ine', a, -1), ('ifind_msb', a), -1), ('ifind_msb', a)), # Misc. lowering + (('fmod@16', a, b), ('fsub', a, ('fmul', b, ('ffloor', ('fdiv', a, b)))), 'options->lower_fmod16'), (('fmod@32', a, b), ('fsub', a, ('fmul', b, ('ffloor', ('fdiv', a, b)))), 'options->lower_fmod32'), (('fmod@64', a, b), ('fsub', a, ('fmul', b, ('ffloor', ('fdiv', a, b)))), 'options->lower_fmod64'), (('frem', a, b), ('fsub', a, ('fmul', b, ('ftrunc', ('fdiv', a, b)))), 'options->lower_fmod32'), diff --git a/src/intel/compiler/brw_compiler.c b/src/intel/compiler/brw_compiler.c index 4fa02ca4d10..b588d5be97b 100644 --- a/src/intel/compiler/brw_compiler.c +++ b/src/intel/compiler/brw_compiler.c @@ -33,6 +33,7 @@ .lower_sub = true, \ .lower_fdiv = true, \ .lower_scmp = true, \ + .lower_fmod16 = true, \ .lower_fmod32 = true, \ .lower_fmod64 = false, \ .lower_bitfield_extract = true, \