From: Marc Zyngier Date: Sun, 13 Nov 2022 16:38:17 +0000 (+0000) Subject: arm64: Add ID_DFR0_EL1.PerfMon values for PMUv3p7 and IMP_DEF X-Git-Tag: v6.2-rc1~77^2~4^2~2^2~19 X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=d017eeabd5092565c3dd1c8a7b00ba724c33c18f;p=tomoyo%2Ftomoyo-test1.git arm64: Add ID_DFR0_EL1.PerfMon values for PMUv3p7 and IMP_DEF Align the ID_DFR0_EL1.PerfMon values with ID_AA64DFR0_EL1.PMUver. Reviewed-by: Oliver Upton Signed-off-by: Marc Zyngier Link: https://lore.kernel.org/r/20221113163832.3154370-2-maz@kernel.org --- diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 7d301700d1a9..84f59ce1dc6d 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -698,6 +698,8 @@ #define ID_DFR0_PERFMON_8_1 0x4 #define ID_DFR0_PERFMON_8_4 0x5 #define ID_DFR0_PERFMON_8_5 0x6 +#define ID_DFR0_PERFMON_8_7 0x7 +#define ID_DFR0_PERFMON_IMP_DEF 0xf #define ID_ISAR4_SWP_FRAC_SHIFT 28 #define ID_ISAR4_PSR_M_SHIFT 24