From: Alexander Graf <agraf@suse.de>
Date: Tue, 3 Jun 2014 22:27:31 +0000 (+0200)
Subject: PPC: e500: Fix TLB lookup for 32bit CPUs
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=deb6ed13ebfcd6c73548225347c5f63225bb471f;p=qmiga%2Fqemu.git

PPC: e500: Fix TLB lookup for 32bit CPUs

When we run 32bit guest CPUs (or 32bit guest code on 64bit CPUs) on
qemu-system-ppc64 the TLB lookup will use the full effective address
as pointer.

However, only the first 32bits are valid when MSR.CM = 0. Check for
that condition.

This makes QEMU boot an e500v2 guest with more than 1G of RAM for me.

Signed-off-by: Alexander Graf <agraf@suse.de>
---

diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index 1e70536e36..4d6b1e20c0 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -903,6 +903,11 @@ static int ppcmas_tlb_check(CPUPPCState *env, ppcmas_tlb_t *tlb,
     target_ulong mask;
     uint32_t tlb_pid;
 
+    if (!msr_cm) {
+        /* In 32bit mode we can only address 32bit EAs */
+        address = (uint32_t)address;
+    }
+
     /* Check valid flag */
     if (!(tlb->mas1 & MAS1_VALID)) {
         return -1;