From: Andy Shevchenko Date: Wed, 25 Jul 2018 14:39:26 +0000 (+0300) Subject: i2c: designware: Convert to use struct i2c_timings X-Git-Tag: v4.19-rc1~69^2~10 X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=e3ea52b578be221d9d5564d17005d01a8d390b92;p=uclinux-h8%2Flinux.git i2c: designware: Convert to use struct i2c_timings Instead of using custom variables and parser, convert the driver to use the ones provided by I2C core. No functional change intended. Signed-off-by: Andy Shevchenko Reviewed-by: Alexandre Belloni Tested-by: Alexandre Belloni Signed-off-by: Wolfram Sang --- diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 29b92f05bb2b..cdba58a3e359 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -212,7 +212,8 @@ * @tx_fifo_depth: depth of the hardware tx fifo * @rx_fifo_depth: depth of the hardware rx fifo * @rx_outstanding: current master-rx elements in tx fifo - * @clk_freq: bus clock frequency + * @timings: bus clock frequency, SDA hold and other timings + * @sda_hold_time: SDA hold value * @ss_hcnt: standard speed HCNT value * @ss_lcnt: standard speed LCNT value * @fs_hcnt: fast speed HCNT value @@ -264,10 +265,8 @@ struct dw_i2c_dev { unsigned int tx_fifo_depth; unsigned int rx_fifo_depth; int rx_outstanding; - u32 clk_freq; + struct i2c_timings timings; u32 sda_hold_time; - u32 sda_falling_time; - u32 scl_falling_time; u16 ss_hcnt; u16 ss_lcnt; u16 fs_hcnt; diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busses/i2c-designware-master.c index a1717bff06a8..c69b8348cf4c 100644 --- a/drivers/i2c/busses/i2c-designware-master.c +++ b/drivers/i2c/busses/i2c-designware-master.c @@ -51,6 +51,7 @@ static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev) const char *mode_str, *fp_str = ""; u32 comp_param1; u32 sda_falling_time, scl_falling_time; + struct i2c_timings *t = &dev->timings; int ret; ret = i2c_dw_acquire_lock(dev); @@ -60,8 +61,8 @@ static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev) i2c_dw_release_lock(dev); /* Set standard and fast speed dividers for high/low periods */ - sda_falling_time = dev->sda_falling_time ?: 300; /* ns */ - scl_falling_time = dev->scl_falling_time ?: 300; /* ns */ + sda_falling_time = t->sda_fall_ns ?: 300; /* ns */ + scl_falling_time = t->scl_fall_ns ?: 300; /* ns */ /* Calculate SCL timing parameters for standard mode if not set */ if (!dev->ss_hcnt || !dev->ss_lcnt) { @@ -85,7 +86,7 @@ static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev) * difference is the timing parameter values since the registers are * the same. */ - if (dev->clk_freq == 1000000) { + if (t->bus_freq_hz == 1000000) { /* * Check are fast mode plus parameters available and use * fast mode if not. diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index 5660daf6c92e..fc1462601b16 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -96,6 +96,7 @@ static void dw_i2c_acpi_params(struct platform_device *pdev, char method[], static int dw_i2c_acpi_configure(struct platform_device *pdev) { struct dw_i2c_dev *dev = platform_get_drvdata(pdev); + struct i2c_timings *t = &dev->timings; u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0; acpi_handle handle = ACPI_HANDLE(&pdev->dev); const struct acpi_device_id *id; @@ -115,7 +116,7 @@ static int dw_i2c_acpi_configure(struct platform_device *pdev) dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht); dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht); - switch (dev->clk_freq) { + switch (t->bus_freq_hz) { case 100000: dev->sda_hold_time = ss_ht; break; @@ -175,6 +176,8 @@ static inline int dw_i2c_acpi_configure(struct platform_device *pdev) static void i2c_dw_configure_master(struct dw_i2c_dev *dev) { + struct i2c_timings *t = &dev->timings; + dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY; dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | @@ -182,7 +185,7 @@ static void i2c_dw_configure_master(struct dw_i2c_dev *dev) dev->mode = DW_IC_MASTER; - switch (dev->clk_freq) { + switch (t->bus_freq_hz) { case 100000: dev->master_cfg |= DW_IC_CON_SPEED_STD; break; @@ -240,7 +243,8 @@ static int dw_i2c_plat_probe(struct platform_device *pdev) struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev); struct i2c_adapter *adap; struct dw_i2c_dev *dev; - u32 acpi_speed, ht = 0; + struct i2c_timings *t; + u32 acpi_speed; struct resource *mem; int i, irq, ret; static const int supported_speeds[] = { @@ -272,18 +276,11 @@ static int dw_i2c_plat_probe(struct platform_device *pdev) reset_control_deassert(dev->rst); } - if (pdata) { - dev->clk_freq = pdata->i2c_scl_freq; - } else { - device_property_read_u32(&pdev->dev, "i2c-sda-hold-time-ns", - &ht); - device_property_read_u32(&pdev->dev, "i2c-sda-falling-time-ns", - &dev->sda_falling_time); - device_property_read_u32(&pdev->dev, "i2c-scl-falling-time-ns", - &dev->scl_falling_time); - device_property_read_u32(&pdev->dev, "clock-frequency", - &dev->clk_freq); - } + t = &dev->timings; + if (pdata) + t->bus_freq_hz = pdata->i2c_scl_freq; + else + i2c_parse_fw_timings(&pdev->dev, t, false); acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev); /* @@ -300,12 +297,12 @@ static int dw_i2c_plat_probe(struct platform_device *pdev) * Find bus speed from the "clock-frequency" device property, ACPI * or by using fast mode if neither is set. */ - if (acpi_speed && dev->clk_freq) - dev->clk_freq = min(dev->clk_freq, acpi_speed); - else if (acpi_speed || dev->clk_freq) - dev->clk_freq = max(dev->clk_freq, acpi_speed); + if (acpi_speed && t->bus_freq_hz) + t->bus_freq_hz = min(t->bus_freq_hz, acpi_speed); + else if (acpi_speed || t->bus_freq_hz) + t->bus_freq_hz = max(t->bus_freq_hz, acpi_speed); else - dev->clk_freq = 400000; + t->bus_freq_hz = 400000; if (has_acpi_companion(&pdev->dev)) dw_i2c_acpi_configure(pdev); @@ -314,11 +311,11 @@ static int dw_i2c_plat_probe(struct platform_device *pdev) * Only standard mode at 100kHz, fast mode at 400kHz, * fast mode plus at 1MHz and high speed mode at 3.4MHz are supported. */ - if (dev->clk_freq != 100000 && dev->clk_freq != 400000 - && dev->clk_freq != 1000000 && dev->clk_freq != 3400000) { + if (t->bus_freq_hz != 100000 && t->bus_freq_hz != 400000 && + t->bus_freq_hz != 1000000 && t->bus_freq_hz != 3400000) { dev_err(&pdev->dev, "%d Hz is unsupported, only 100kHz, 400kHz, 1MHz and 3.4MHz are supported\n", - dev->clk_freq); + t->bus_freq_hz); ret = -EINVAL; goto exit_reset; } @@ -334,12 +331,14 @@ static int dw_i2c_plat_probe(struct platform_device *pdev) dev->clk = devm_clk_get(&pdev->dev, NULL); if (!i2c_dw_prepare_clk(dev, true)) { + u64 clk_khz; + dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz; + clk_khz = dev->get_clk_rate_khz(dev); - if (!dev->sda_hold_time && ht) - dev->sda_hold_time = div_u64( - (u64)dev->get_clk_rate_khz(dev) * ht + 500000, - 1000000); + if (!dev->sda_hold_time && t->sda_hold_ns) + dev->sda_hold_time = + div_u64(clk_khz * t->sda_hold_ns + 500000, 1000000); } dw_i2c_set_fifo_size(dev, pdev->id);