From: Kazushi (Jam) Marukawa Date: Thu, 10 Dec 2020 06:10:01 +0000 (+0900) Subject: [VE][NFC] Disable VP tests X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=e954ba28bcac9dc8d0ffc57d56ffa06ea2cd2f69;p=android-x86%2Fexternal-llvm-project.git [VE][NFC] Disable VP tests VP tests recently added don't work on Release mode. They work on Debug mode, so I disable them on Release mode to make tests work. --- diff --git a/llvm/test/CodeGen/VE/Vector/vp_add.ll b/llvm/test/CodeGen/VE/Vector/vp_add.ll index b69a1a1bd59..52808a56fbb 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_add.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_add.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_add [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_and.ll b/llvm/test/CodeGen/VE/Vector/vp_and.ll index 7507a1a3409..5f7333ffbba 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_and.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_and.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_and [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_ashr.ll b/llvm/test/CodeGen/VE/Vector/vp_ashr.ll index c4c1def0b56..cdce387d0d6 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_ashr.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_ashr.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_ashr [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_lshr.ll b/llvm/test/CodeGen/VE/Vector/vp_lshr.ll index 79e38e0c128..e42a3b62c89 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_lshr.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_lshr.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_lshr [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_mul.ll b/llvm/test/CodeGen/VE/Vector/vp_mul.ll index 454000e10d0..c7f8c00b64f 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_mul.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_mul.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_mul [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_or.ll b/llvm/test/CodeGen/VE/Vector/vp_or.ll index 71cef7d1b8c..684ac1e5b3d 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_or.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_or.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_or [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_sdiv.ll b/llvm/test/CodeGen/VE/Vector/vp_sdiv.ll index 4fa7ae516d8..2f99c09a178 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_sdiv.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_sdiv.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_sdiv [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_shl.ll b/llvm/test/CodeGen/VE/Vector/vp_shl.ll index 84675b640de..2cb526bd845 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_shl.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_shl.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_shl [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_srem.ll b/llvm/test/CodeGen/VE/Vector/vp_srem.ll index 95275249800..b52d5edfe75 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_srem.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_srem.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_srem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_sub.ll b/llvm/test/CodeGen/VE/Vector/vp_sub.ll index 575d3dc4675..5e093b2ec10 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_sub.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_sub.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_sub [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_udiv.ll b/llvm/test/CodeGen/VE/Vector/vp_udiv.ll index 491b398a2d2..e35a41de8f4 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_udiv.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_udiv.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_udiv [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_urem.ll b/llvm/test/CodeGen/VE/Vector/vp_urem.ll index 340d3b4e47b..9b2b93d18ab 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_urem.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_urem.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_urem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] diff --git a/llvm/test/CodeGen/VE/Vector/vp_xor.ll b/llvm/test/CodeGen/VE/Vector/vp_xor.ll index b743abcec87..dafac6548bf 100644 --- a/llvm/test/CodeGen/VE/Vector/vp_xor.ll +++ b/llvm/test/CodeGen/VE/Vector/vp_xor.ll @@ -1,3 +1,4 @@ +; REQUIRES: asserts ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s ; CHECK: t{{[0-9]+}}: v256i32 = vp_xor [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]