From: Heejin Ahn <aheejin@gmail.com>
Date: Mon, 20 Aug 2018 23:49:29 +0000 (+0000)
Subject: [WebAssembly] Revert type of wake count in atomic.wake to i32
X-Git-Tag: android-x86-9.0-r1~14052
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=ec4b6d95ef155541d94f7592ead5fd7a0d7a687c;p=android-x86%2Fexternal-llvm.git

[WebAssembly] Revert type of wake count in atomic.wake to i32

Summary:
We decided to revert this from i64 to i32 in Nov 28 CG meeting. Fixes
PR38632.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, sunfish, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D51010

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340234 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/include/llvm/IR/IntrinsicsWebAssembly.td b/include/llvm/IR/IntrinsicsWebAssembly.td
index c94972cca64..6eccc599718 100644
--- a/include/llvm/IR/IntrinsicsWebAssembly.td
+++ b/include/llvm/IR/IntrinsicsWebAssembly.td
@@ -83,7 +83,7 @@ def int_wasm_atomic_wait_i64 :
              IntrHasSideEffects],
              "", [SDNPMemOperand]>;
 def int_wasm_atomic_notify:
-  Intrinsic<[llvm_i64_ty], [LLVMPointerType<llvm_i32_ty>, llvm_i64_ty],
+  Intrinsic<[llvm_i32_ty], [LLVMPointerType<llvm_i32_ty>, llvm_i32_ty],
             [IntrInaccessibleMemOnly, NoCapture<0>, IntrHasSideEffects], "",
             [SDNPMemOperand]>;
 
diff --git a/lib/Target/WebAssembly/WebAssemblyInstrAtomics.td b/lib/Target/WebAssembly/WebAssemblyInstrAtomics.td
index 2c66efe09d8..6ea6d31587f 100644
--- a/lib/Target/WebAssembly/WebAssemblyInstrAtomics.td
+++ b/lib/Target/WebAssembly/WebAssemblyInstrAtomics.td
@@ -907,8 +907,8 @@ defm : TerRMWTruncExtPattern<
 let Defs = [ARGUMENTS] in {
 let hasSideEffects = 1 in {
 defm ATOMIC_NOTIFY :
-  I<(outs I64:$dst),
-    (ins P2Align:$p2align, offset32_op:$off, I32:$addr, I64:$count),
+  I<(outs I32:$dst),
+    (ins P2Align:$p2align, offset32_op:$off, I32:$addr, I32:$count),
     (outs), (ins P2Align:$p2align, offset32_op:$off), [],
     "atomic.notify \t$dst, ${off}(${addr})${p2align}, $count",
     "atomic.notify \t${off}, ${p2align}", 0xfe00>;
@@ -932,45 +932,45 @@ defm ATOMIC_WAIT_I64 :
 let Predicates = [HasAtomics] in {
 // Select notifys with no constant offset.
 class NotifyPatNoOffset<Intrinsic kind> :
-  Pat<(i64 (kind I32:$addr, I64:$count)),
-      (ATOMIC_NOTIFY 0, 0, I32:$addr, I64:$count)>;
+  Pat<(i32 (kind I32:$addr, I32:$count)),
+      (ATOMIC_NOTIFY 0, 0, I32:$addr, I32:$count)>;
 def : NotifyPatNoOffset<int_wasm_atomic_notify>;
 
 // Select notifys with a constant offset.
 
 // Pattern with address + immediate offset
 class NotifyPatImmOff<Intrinsic kind, PatFrag operand> :
-  Pat<(i64 (kind (operand I32:$addr, imm:$off), I64:$count)),
-      (ATOMIC_NOTIFY 0, imm:$off, I32:$addr, I64:$count)>;
+  Pat<(i32 (kind (operand I32:$addr, imm:$off), I32:$count)),
+      (ATOMIC_NOTIFY 0, imm:$off, I32:$addr, I32:$count)>;
 def : NotifyPatImmOff<int_wasm_atomic_notify, regPlusImm>;
 def : NotifyPatImmOff<int_wasm_atomic_notify, or_is_add>;
 
 class NotifyPatGlobalAddr<Intrinsic kind> :
-  Pat<(i64 (kind (regPlusGA I32:$addr, (WebAssemblywrapper tglobaladdr:$off)),
-                 I64:$count)),
-      (ATOMIC_NOTIFY 0, tglobaladdr:$off, I32:$addr, I64:$count)>;
+  Pat<(i32 (kind (regPlusGA I32:$addr, (WebAssemblywrapper tglobaladdr:$off)),
+                 I32:$count)),
+      (ATOMIC_NOTIFY 0, tglobaladdr:$off, I32:$addr, I32:$count)>;
 def : NotifyPatGlobalAddr<int_wasm_atomic_notify>;
 
 class NotifyPatExternalSym<Intrinsic kind> :
-  Pat<(i64 (kind (add I32:$addr, (WebAssemblywrapper texternalsym:$off)),
-                 I64:$count)),
-      (ATOMIC_NOTIFY 0, texternalsym:$off, I32:$addr, I64:$count)>;
+  Pat<(i32 (kind (add I32:$addr, (WebAssemblywrapper texternalsym:$off)),
+                 I32:$count)),
+      (ATOMIC_NOTIFY 0, texternalsym:$off, I32:$addr, I32:$count)>;
 def : NotifyPatExternalSym<int_wasm_atomic_notify>;
 
 // Select notifys with just a constant offset.
 class NotifyPatOffsetOnly<Intrinsic kind> :
-  Pat<(i64 (kind imm:$off, I64:$count)),
-      (ATOMIC_NOTIFY 0, imm:$off, (CONST_I32 0), I64:$count)>;
+  Pat<(i32 (kind imm:$off, I32:$count)),
+      (ATOMIC_NOTIFY 0, imm:$off, (CONST_I32 0), I32:$count)>;
 def : NotifyPatOffsetOnly<int_wasm_atomic_notify>;
 
 class NotifyPatGlobalAddrOffOnly<Intrinsic kind> :
-  Pat<(i64 (kind (WebAssemblywrapper tglobaladdr:$off), I64:$count)),
-      (ATOMIC_NOTIFY 0, tglobaladdr:$off, (CONST_I32 0), I64:$count)>;
+  Pat<(i32 (kind (WebAssemblywrapper tglobaladdr:$off), I32:$count)),
+      (ATOMIC_NOTIFY 0, tglobaladdr:$off, (CONST_I32 0), I32:$count)>;
 def : NotifyPatGlobalAddrOffOnly<int_wasm_atomic_notify>;
 
 class NotifyPatExternSymOffOnly<Intrinsic kind> :
-  Pat<(i64 (kind (WebAssemblywrapper texternalsym:$off), I64:$count)),
-      (ATOMIC_NOTIFY 0, texternalsym:$off, (CONST_I32 0), I64:$count)>;
+  Pat<(i32 (kind (WebAssemblywrapper texternalsym:$off), I32:$count)),
+      (ATOMIC_NOTIFY 0, texternalsym:$off, (CONST_I32 0), I32:$count)>;
 def : NotifyPatExternSymOffOnly<int_wasm_atomic_notify>;
 
 // Select waits with no constant offset.
diff --git a/test/CodeGen/WebAssembly/offset-atomics.ll b/test/CodeGen/WebAssembly/offset-atomics.ll
index ed9aed01c9c..b80425a3036 100644
--- a/test/CodeGen/WebAssembly/offset-atomics.ll
+++ b/test/CodeGen/WebAssembly/offset-atomics.ll
@@ -1701,38 +1701,38 @@ define i32 @wait_i64_with_unfolded_gep_offset(i64* %p, i64 %exp, i64 %timeout) {
 ; Notifies
 ;===----------------------------------------------------------------------------
 
-declare i64 @llvm.wasm.atomic.notify(i32*, i64)
+declare i32 @llvm.wasm.atomic.notify(i32*, i32)
 
 ; Basic notify.
 
 ; CHECK-LABEL: notify_no_offset:
 ; CHECK: atomic.notify $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
-define i64 @notify_no_offset(i32* %p, i64 %notify_count) {
-  %v = call i64 @llvm.wasm.atomic.notify(i32* %p, i64 %notify_count)
-  ret i64 %v
+define i32 @notify_no_offset(i32* %p, i32 %notify_count) {
+  %v = call i32 @llvm.wasm.atomic.notify(i32* %p, i32 %notify_count)
+  ret i32 %v
 }
 
 ; With an nuw add, we can fold an offset.
 
 ; CHECK-LABEL: notify_with_folded_offset:
 ; CHECK: atomic.notify $push0=, 24($0), $1{{$}}
-define i64 @notify_with_folded_offset(i32* %p, i64 %notify_count) {
+define i32 @notify_with_folded_offset(i32* %p, i32 %notify_count) {
   %q = ptrtoint i32* %p to i32
   %r = add nuw i32 %q, 24
   %s = inttoptr i32 %r to i32*
-  %t = call i64 @llvm.wasm.atomic.notify(i32* %s, i64 %notify_count)
-  ret i64 %t
+  %t = call i32 @llvm.wasm.atomic.notify(i32* %s, i32 %notify_count)
+  ret i32 %t
 }
 
 ; With an inbounds gep, we can fold an offset.
 
 ; CHECK-LABEL: notify_with_folded_gep_offset:
 ; CHECK: atomic.notify $push0=, 24($0), $1{{$}}
-define i64 @notify_with_folded_gep_offset(i32* %p, i64 %notify_count) {
+define i32 @notify_with_folded_gep_offset(i32* %p, i32 %notify_count) {
   %s = getelementptr inbounds i32, i32* %p, i32 6
-  %t = call i64 @llvm.wasm.atomic.notify(i32* %s, i64 %notify_count)
-  ret i64 %t
+  %t = call i32 @llvm.wasm.atomic.notify(i32* %s, i32 %notify_count)
+  ret i32 %t
 }
 
 ; We can't fold a negative offset though, even with an inbounds gep.
@@ -1741,10 +1741,10 @@ define i64 @notify_with_folded_gep_offset(i32* %p, i64 %notify_count) {
 ; CHECK: i32.const $push0=, -24{{$}}
 ; CHECK: i32.add $push1=, $0, $pop0{{$}}
 ; CHECK: atomic.notify $push2=, 0($pop1), $1{{$}}
-define i64 @notify_with_unfolded_gep_negative_offset(i32* %p, i64 %notify_count) {
+define i32 @notify_with_unfolded_gep_negative_offset(i32* %p, i32 %notify_count) {
   %s = getelementptr inbounds i32, i32* %p, i32 -6
-  %t = call i64 @llvm.wasm.atomic.notify(i32* %s, i64 %notify_count)
-  ret i64 %t
+  %t = call i32 @llvm.wasm.atomic.notify(i32* %s, i32 %notify_count)
+  ret i32 %t
 }
 
 ; Without nuw, and even with nsw, we can't fold an offset.
@@ -1753,12 +1753,12 @@ define i64 @notify_with_unfolded_gep_negative_offset(i32* %p, i64 %notify_count)
 ; CHECK: i32.const $push0=, 24{{$}}
 ; CHECK: i32.add $push1=, $0, $pop0{{$}}
 ; CHECK: atomic.notify $push2=, 0($pop1), $1{{$}}
-define i64 @notify_with_unfolded_offset(i32* %p, i64 %notify_count) {
+define i32 @notify_with_unfolded_offset(i32* %p, i32 %notify_count) {
   %q = ptrtoint i32* %p to i32
   %r = add nsw i32 %q, 24
   %s = inttoptr i32 %r to i32*
-  %t = call i64 @llvm.wasm.atomic.notify(i32* %s, i64 %notify_count)
-  ret i64 %t
+  %t = call i32 @llvm.wasm.atomic.notify(i32* %s, i32 %notify_count)
+  ret i32 %t
 }
 
 ; Without inbounds, we can't fold a gep offset.
@@ -1767,10 +1767,10 @@ define i64 @notify_with_unfolded_offset(i32* %p, i64 %notify_count) {
 ; CHECK: i32.const $push0=, 24{{$}}
 ; CHECK: i32.add $push1=, $0, $pop0{{$}}
 ; CHECK: atomic.notify $push2=, 0($pop1), $1{{$}}
-define i64 @notify_with_unfolded_gep_offset(i32* %p, i64 %notify_count) {
+define i32 @notify_with_unfolded_gep_offset(i32* %p, i32 %notify_count) {
   %s = getelementptr i32, i32* %p, i32 6
-  %t = call i64 @llvm.wasm.atomic.notify(i32* %s, i64 %notify_count)
-  ret i64 %t
+  %t = call i32 @llvm.wasm.atomic.notify(i32* %s, i32 %notify_count)
+  ret i32 %t
 }
 
 ; When notifying from a fixed address, materialize a zero.
@@ -1778,16 +1778,16 @@ define i64 @notify_with_unfolded_gep_offset(i32* %p, i64 %notify_count) {
 ; CHECK-LABEL: notify_from_numeric_address
 ; CHECK: i32.const $push0=, 0{{$}}
 ; CHECK: atomic.notify $push1=, 42($pop0), $0{{$}}
-define i64 @notify_from_numeric_address(i64 %notify_count) {
+define i32 @notify_from_numeric_address(i32 %notify_count) {
   %s = inttoptr i32 42 to i32*
-  %t = call i64 @llvm.wasm.atomic.notify(i32* %s, i64 %notify_count)
-  ret i64 %t
+  %t = call i32 @llvm.wasm.atomic.notify(i32* %s, i32 %notify_count)
+  ret i32 %t
 }
 
 ; CHECK-LABEL: notify_from_global_address
 ; CHECK: i32.const $push0=, 0{{$}}
 ; CHECK: atomic.notify $push1=, gv($pop0), $0{{$}}
-define i64 @notify_from_global_address(i64 %notify_count) {
-  %t = call i64 @llvm.wasm.atomic.notify(i32* @gv, i64 %notify_count)
-  ret i64 %t
+define i32 @notify_from_global_address(i32 %notify_count) {
+  %t = call i32 @llvm.wasm.atomic.notify(i32* @gv, i32 %notify_count)
+  ret i32 %t
 }