From: Jaroslav Kysela <perex@perex.cz>
Date: Wed, 2 Jun 2010 11:29:17 +0000 (+0200)
Subject: ALSA: hda-intel - fix wallclk variable update and condition
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=edb39935c8b19fcd9a8f619d0bc1e9d04594cd2b;p=sagit-ice-cold%2Fkernel_xiaomi_msm8998.git

ALSA: hda-intel - fix wallclk variable update and condition

This patch fixes thinko introduced in "last minutes" before commiting
of the last wallclk patch.

It also fixes the condition checking if the first period after last
wallclk update is processed. There is a little rounding error in
period_wallclk.

Signed-off-by: Jaroslav Kysela <perex@perex.cz>
---

diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index dc79564fea30..af701a894687 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -1913,11 +1913,11 @@ static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
 	if (WARN_ONCE(!azx_dev->period_bytes,
 		      "hda-intel: zero azx_dev->period_bytes"))
 		return -1; /* this shouldn't happen! */
-	if (wallclk <= azx_dev->period_wallclk &&
+	if (wallclk < (azx_dev->period_wallclk * 5) / 4 &&
 	    pos % azx_dev->period_bytes > azx_dev->period_bytes / 2)
 		/* NG - it's below the first next period boundary */
 		return bdl_pos_adj[chip->dev_index] ? 0 : -1;
-	azx_dev->start_wallclk = wallclk;
+	azx_dev->start_wallclk += wallclk;
 	return 1; /* OK, it's fine */
 }