From: Clement Courbet Date: Wed, 7 Feb 2018 09:58:55 +0000 (+0000) Subject: [MergeICmps] Re-commit rL324317 "Enable the MergeICmps Pass by default." X-Git-Tag: android-x86-7.1-r4~5344 X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=ee43c8204a4ff2f2d8070ada7a1e9953003cb3c3;p=android-x86%2Fexternal-llvm.git [MergeICmps] Re-commit rL324317 "Enable the MergeICmps Pass by default." With fixes from rL324341. Original commit message: [MergeICmps] Enable the MergeICmps Pass by default. Summary: Now that PR33325 is fixed, this should always improve the generated code. Reviewers: spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42793 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324465 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/TargetPassConfig.cpp b/lib/CodeGen/TargetPassConfig.cpp index 43fec69495b..84597570c16 100644 --- a/lib/CodeGen/TargetPassConfig.cpp +++ b/lib/CodeGen/TargetPassConfig.cpp @@ -94,10 +94,9 @@ static cl::opt EnableImplicitNullChecks( "enable-implicit-null-checks", cl::desc("Fold null checks into faulting memory operations"), cl::init(false), cl::Hidden); -static cl::opt - EnableMergeICmps("enable-mergeicmps", - cl::desc("Merge ICmp chains into a single memcmp"), - cl::init(false), cl::Hidden); +static cl::opt DisableMergeICmps("disable-mergeicmps", + cl::desc("Disable MergeICmps Pass"), + cl::init(false), cl::Hidden); static cl::opt PrintLSR("print-lsr-output", cl::Hidden, cl::desc("Print LLVM IR produced by the loop-reduce pass")); static cl::opt PrintISelInput("print-isel-input", cl::Hidden, @@ -596,7 +595,7 @@ void TargetPassConfig::addIRPasses() { // loads and compares. ExpandMemCmpPass then tries to expand those calls // into optimally-sized loads and compares. The transforms are enabled by a // target lowering hook. - if (EnableMergeICmps) + if (!DisableMergeICmps) addPass(createMergeICmpsPass()); addPass(createExpandMemCmpPass()); } diff --git a/test/CodeGen/Generic/llc-start-stop.ll b/test/CodeGen/Generic/llc-start-stop.ll index 9056e2cab49..9f5e75a86dc 100644 --- a/test/CodeGen/Generic/llc-start-stop.ll +++ b/test/CodeGen/Generic/llc-start-stop.ll @@ -13,15 +13,15 @@ ; STOP-BEFORE-NOT: Loop Strength Reduction ; RUN: llc < %s -debug-pass=Structure -start-after=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=START-AFTER -; START-AFTER: -machine-branch-prob -expandmemcmp +; START-AFTER: -machine-branch-prob -mergeicmps ; START-AFTER: FunctionPass Manager -; START-AFTER-NEXT: Expand memcmp() to load/stores +; START-AFTER-NEXT: Merge contiguous icmps into a memcmp ; RUN: llc < %s -debug-pass=Structure -start-before=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=START-BEFORE ; START-BEFORE: -machine-branch-prob -domtree ; START-BEFORE: FunctionPass Manager ; START-BEFORE: Loop Strength Reduction -; START-BEFORE-NEXT: Expand memcmp() to load/stores +; START-BEFORE-NEXT: Merge contiguous icmps into a memcmp ; RUN: not llc < %s -start-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-START-BEFORE ; RUN: not llc < %s -stop-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-STOP-BEFORE diff --git a/test/CodeGen/PowerPC/memcmp-mergeexpand.ll b/test/CodeGen/PowerPC/memcmp-mergeexpand.ll index c87abbfa7be..83b1cd505db 100644 --- a/test/CodeGen/PowerPC/memcmp-mergeexpand.ll +++ b/test/CodeGen/PowerPC/memcmp-mergeexpand.ll @@ -7,22 +7,12 @@ define zeroext i1 @opeq1( ; PPC64LE-LABEL: opeq1: -; PPC64LE: # %bb.0: # %entry -; PPC64LE-NEXT: lwz 5, 0(3) -; PPC64LE-NEXT: lwz 6, 0(4) -; PPC64LE-NEXT: cmplw 5, 6 -; PPC64LE-NEXT: bne 0, .LBB0_2 -; PPC64LE-NEXT: # %bb.1: # %land.rhs.i -; PPC64LE-NEXT: lwz 3, 4(3) -; PPC64LE-NEXT: lwz 4, 4(4) -; PPC64LE-NEXT: cmpw 3, 4 -; PPC64LE-NEXT: b .LBB0_3 -; PPC64LE-NEXT: .LBB0_2: -; PPC64LE-NEXT: crxor 2, 2, 2 -; PPC64LE-NEXT: .LBB0_3: # %opeq1.exit -; PPC64LE-NEXT: li 3, 0 -; PPC64LE-NEXT: li 4, 1 -; PPC64LE-NEXT: isel 3, 4, 3, 2 +; PPC64LE: # %bb.0: # %opeq1.exit +; PPC64LE-NEXT: ld 3, 0(3) +; PPC64LE-NEXT: ld 4, 0(4) +; PPC64LE-NEXT: xor 3, 3, 4 +; PPC64LE-NEXT: cntlzd 3, 3 +; PPC64LE-NEXT: rldicl 3, 3, 58, 63 ; PPC64LE-NEXT: blr %"struct.std::pair"* nocapture readonly dereferenceable(8) %a, %"struct.std::pair"* nocapture readonly dereferenceable(8) %b) local_unnamed_addr #0 { diff --git a/test/CodeGen/X86/memcmp-mergeexpand.ll b/test/CodeGen/X86/memcmp-mergeexpand.ll index 1b928d6f967..1c470177c27 100644 --- a/test/CodeGen/X86/memcmp-mergeexpand.ll +++ b/test/CodeGen/X86/memcmp-mergeexpand.ll @@ -8,37 +8,22 @@ define zeroext i1 @opeq1( ; X86-LABEL: opeq1: -; X86: # %bb.0: # %entry +; X86: # %bb.0: # %opeq1.exit ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl (%ecx), %edx -; X86-NEXT: cmpl (%eax), %edx -; X86-NEXT: jne .LBB0_1 -; X86-NEXT: # %bb.2: # %land.rhs.i ; X86-NEXT: movl 4(%ecx), %ecx -; X86-NEXT: cmpl 4(%eax), %ecx +; X86-NEXT: xorl (%eax), %edx +; X86-NEXT: xorl 4(%eax), %ecx +; X86-NEXT: orl %edx, %ecx ; X86-NEXT: sete %al -; X86-NEXT: # kill: def $al killed $al killed $eax -; X86-NEXT: retl -; X86-NEXT: .LBB0_1: -; X86-NEXT: xorl %eax, %eax -; X86-NEXT: # kill: def $al killed $al killed $eax ; X86-NEXT: retl ; ; X64-LABEL: opeq1: -; X64: # %bb.0: # %entry -; X64-NEXT: movl (%rdi), %eax -; X64-NEXT: cmpl (%rsi), %eax -; X64-NEXT: jne .LBB0_1 -; X64-NEXT: # %bb.2: # %land.rhs.i -; X64-NEXT: movl 4(%rdi), %eax -; X64-NEXT: cmpl 4(%rsi), %eax +; X64: # %bb.0: # %opeq1.exit +; X64-NEXT: movq (%rdi), %rax +; X64-NEXT: cmpq (%rsi), %rax ; X64-NEXT: sete %al -; X64-NEXT: # kill: def $al killed $al killed $eax -; X64-NEXT: retq -; X64-NEXT: .LBB0_1: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: # kill: def $al killed $al killed $eax ; X64-NEXT: retq %"struct.std::pair"* nocapture readonly dereferenceable(8) %a, %"struct.std::pair"* nocapture readonly dereferenceable(8) %b) local_unnamed_addr #0 {