From: Richard Henderson Date: Fri, 17 Dec 2021 16:57:14 +0000 (+0100) Subject: target/ppc: Move float_check_status from FPU_FCTI to translate X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=f2e25046766ed39e56d8dd5c6de790e430804511;p=qmiga%2Fqemu.git target/ppc: Move float_check_status from FPU_FCTI to translate Fixes a bug in which e.g XE enabled causes inexact to be raised before the writeback to the architectural register. All of the users of GEN_FLOAT_B either set set_fprf, or are one of the convert-to-integer instructions that require this behaviour. Split out the two gen_helper_* calls in gen_compute_fprf_float64 and protect only the first with set_fprf. Signed-off-by: Richard Henderson Message-Id: <20211119160502.17432-12-richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater --- diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 9bcd7abd16..f453b04751 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -600,12 +600,9 @@ uint64_t helper_##op(CPUPPCState *env, float64 arg) \ uint64_t ret = float64_to_##cvt(arg, &env->fp_status); \ int status = get_float_exception_flags(&env->fp_status); \ \ - if (unlikely(status)) { \ - if (status & float_flag_invalid) { \ - float_invalid_cvt(env, 1, GETPC(), float64_classify(arg)); \ - ret = nanval; \ - } \ - do_float_check_status(env, GETPC()); \ + if (unlikely(status & float_flag_invalid)) { \ + float_invalid_cvt(env, 1, GETPC(), float64_classify(arg)); \ + ret = nanval; \ } \ return ret; \ } diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc index 8afd6a087d..0767e45d87 100644 --- a/target/ppc/translate/fp-impl.c.inc +++ b/target/ppc/translate/fp-impl.c.inc @@ -157,8 +157,9 @@ static void gen_f##name(DisasContext *ctx) \ gen_helper_f##name(t1, cpu_env, t0); \ set_fpr(rD(ctx->opcode), t1); \ if (set_fprf) { \ - gen_compute_fprf_float64(t1); \ + gen_helper_compute_fprf_float64(cpu_env, t1); \ } \ + gen_helper_float_check_status(cpu_env); \ if (unlikely(Rc(ctx->opcode) != 0)) { \ gen_set_cr1_from_fpscr(ctx); \ } \