From: Ulrich Weigand <ulrich.weigand@de.ibm.com>
Date: Fri, 21 Jun 2013 14:43:10 +0000 (+0000)
Subject: [PowerPC] Support @toc@h modifier
X-Git-Tag: android-x86-6.0-r1~146^2~1592
X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=f8f87dcfceadd1b842d130303a7091ad7d7d67d0;p=android-x86%2Fexternal-llvm.git

[PowerPC] Support @toc@h modifier

This adds the relocation type and other necessary infrastructure
to use the @toc@h modifier in the assembler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184549 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/include/llvm/MC/MCExpr.h b/include/llvm/MC/MCExpr.h
index 7edcd66b442..8e03b86ff6c 100644
--- a/include/llvm/MC/MCExpr.h
+++ b/include/llvm/MC/MCExpr.h
@@ -177,6 +177,7 @@ public:
     VK_PPC_TOCBASE,        // symbol@tocbase
     VK_PPC_TOC,            // symbol@toc
     VK_PPC_TOC_LO,         // symbol@toc@l
+    VK_PPC_TOC_HI,         // symbol@toc@h
     VK_PPC_TOC_HA,         // symbol@toc@ha
     VK_PPC_TPREL_LO,       // symbol@tprel@l
     VK_PPC_TPREL_HA,       // symbol@tprel@ha
diff --git a/include/llvm/Object/ELF.h b/include/llvm/Object/ELF.h
index 05c0947d69b..507791bd738 100644
--- a/include/llvm/Object/ELF.h
+++ b/include/llvm/Object/ELF.h
@@ -2057,6 +2057,7 @@ StringRef ELFObjectFile<ELFT>::getRelocationTypeName(uint32_t Type) const {
       LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_PPC64_REL64);
       LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_PPC64_TOC16);
       LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_PPC64_TOC16_LO);
+      LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_PPC64_TOC16_HI);
       LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_PPC64_TOC16_HA);
       LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_PPC64_TOC);
       LLVM_ELF_SWITCH_RELOC_TYPE_NAME(R_PPC64_ADDR16_DS);
diff --git a/include/llvm/Support/ELF.h b/include/llvm/Support/ELF.h
index ac11f0af195..7aba542dc27 100644
--- a/include/llvm/Support/ELF.h
+++ b/include/llvm/Support/ELF.h
@@ -488,6 +488,7 @@ enum {
   R_PPC64_REL64               = 44,
   R_PPC64_TOC16               = 47,
   R_PPC64_TOC16_LO            = 48,
+  R_PPC64_TOC16_HI            = 49,
   R_PPC64_TOC16_HA            = 50,
   R_PPC64_TOC                 = 51,
   R_PPC64_ADDR16_DS           = 56,
diff --git a/lib/MC/MCExpr.cpp b/lib/MC/MCExpr.cpp
index f59222263da..454965a3a8a 100644
--- a/lib/MC/MCExpr.cpp
+++ b/lib/MC/MCExpr.cpp
@@ -202,6 +202,7 @@ StringRef MCSymbolRefExpr::getVariantKindName(VariantKind Kind) {
   case VK_PPC_TOCBASE: return "tocbase";
   case VK_PPC_TOC: return "toc";
   case VK_PPC_TOC_LO: return "toc@l";
+  case VK_PPC_TOC_HI: return "toc@h";
   case VK_PPC_TOC_HA: return "toc@ha";
   case VK_PPC_TPREL_LO: return "tprel@l";
   case VK_PPC_TPREL_HA: return "tprel@ha";
@@ -292,6 +293,8 @@ MCSymbolRefExpr::getVariantKindForName(StringRef Name) {
     .Case("toc", VK_PPC_TOC)
     .Case("TOC@L", VK_PPC_TOC_LO)
     .Case("toc@l", VK_PPC_TOC_LO)
+    .Case("TOC@H", VK_PPC_TOC_HI)
+    .Case("toc@h", VK_PPC_TOC_HI)
     .Case("TOC@HA", VK_PPC_TOC_HA)
     .Case("toc@ha", VK_PPC_TOC_HA)
     .Case("TLS", VK_PPC_TLS)
diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
index 9a528164040..ed775295492 100644
--- a/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
+++ b/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
@@ -102,6 +102,9 @@ unsigned PPCELFObjectWriter::getRelocTypeInner(const MCValue &Target,
       case MCSymbolRefExpr::VK_PPC_TOC_LO:
         Type = ELF::R_PPC64_TOC16_LO;
         break;
+      case MCSymbolRefExpr::VK_PPC_TOC_HI:
+        Type = ELF::R_PPC64_TOC16_HI;
+        break;
       case MCSymbolRefExpr::VK_PPC_TOC_HA:
         Type = ELF::R_PPC64_TOC16_HA;
         break;
diff --git a/test/MC/PowerPC/ppc64-fixups.s b/test/MC/PowerPC/ppc64-fixups.s
index bb6c7be8d1d..9accde047c6 100644
--- a/test/MC/PowerPC/ppc64-fixups.s
+++ b/test/MC/PowerPC/ppc64-fixups.s
@@ -82,6 +82,11 @@
 # CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO target 0x0
          addi 4, 3, target@toc@l
 
+# CHECK: addis 3, 2, target@toc@h        # encoding: [0x3c,0x62,A,A]
+# CHECK-NEXT:                            #   fixup A - offset: 2, value: target@toc@h, kind: fixup_ppc_half16
+# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_HI target 0x0
+         addis 3, 2, target@toc@h
+
 # CHECK: lwz 1, target@toc@l(3)          # encoding: [0x80,0x23,A,A]
 # CHECK-NEXT:                            #   fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16
 # CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO target 0x0