From: Wenbin Mei Date: Fri, 17 Sep 2021 12:48:01 +0000 (+0800) Subject: dt-bindings: mmc: mtk-sd: Add hs400 dly3 setting X-Git-Url: http://git.osdn.net/view?a=commitdiff_plain;h=fb4708e6cb5c70a0dca5437640f1f85b9042256e;p=uclinux-h8%2Flinux.git dt-bindings: mmc: mtk-sd: Add hs400 dly3 setting Add hs400 dly3 setting for mtk-sd yaml Signed-off-by: Wenbin Mei Acked-by: Rob Herring Reviewed-by: Linus Walleij Link: https://lore.kernel.org/r/20210917124803.22871-2-wenbin.mei@mediatek.com Signed-off-by: Ulf Hansson --- diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml index e866e985549e..82768a807294 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml @@ -119,6 +119,18 @@ properties: If present, HS400 command responses are sampled on rising edges. If not present, HS400 command responses are sampled on falling edges. + mediatek,hs400-ds-dly3: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Gear of the third delay line for DS for input data latch in data + pad macro, there are 32 stages from 0 to 31. + For different corner IC, the time is different about one step, it is + about 100ps. + The value is confirmed by doing scan and calibration to find a best + value with corner IC and it is valid only for HS400 mode. + minimum: 0 + maximum: 31 + mediatek,latch-ck: $ref: /schemas/types.yaml#/definitions/uint32 description: